Power integrity @ DesignCon 2016


Two more weeks before DesignCon 2016!

Jan 6, 2016 -- DesignCon may appear package- and PCB-focused only, but it's actually also covering SoC related power integrity topics, and as DesignCon 2016 is a great opportunity to meet old friends and colleagues to discuss on-chip Dynamic Voltage Drop and in-rush current challenges, we will be there too; ready to discuss the latest and greatest on how we can improve on-chip power integrity.

In case you haven’t considered DesignCon yet, or even checked the program, note that there are a couple of really interesting sessions on power integrity. We have compiled all the details of these sessions so you can look at the descriptions, who the presenters are etc. 

Go  HERE to download the single PDF file with the full details and description.  

Wednesday Jan 20th

  • Impacts of Dynamic Noise in Multi-Core or SOC Designs 
  • Evaluation of PDN coupling on SOC 
  • A Novel Power-Supply-Induced-Jitter Suppression Technique for High-Speed Interface Using Modulated-PDN 

Thursday Jan 21st 

  • A Frequency Domain Approach to Transient Result for Power Distribution Network Analysis 
  • Block-Level Modeling Based Power and Signal Integrity Performance Optimization of Integrated Core and Memory System 
  • PDN Prototyping and Optimization at an Early Design Stage 

 



Read the complete story ...


Review Article Be the first to review this article
Downstream : Solutuions for Post processing PCB Designs

Featured Video
Jobs
Design Verification Engineer for intersil at Morrisville, NC
Principle Electronic Design Engr for Cypress Semiconductor at San Jose, CA
ASIC Hardware Engineer for BAE Systems Intelligence & Security at Arlington, VA
Senior Electrical Engineer for Allen & Shariff Corporation at Pittsburgh, PA
Applications Engineer for intersil at Palm Bay, FL
Upcoming Events
IPC APEX EXPO 2018 at San Diego Convention Center San Diego CA - Feb 24 - 1, 2018
DVCon US 2018 at Double Tree Hotel San Jose CA - Feb 26 - 1, 2018
5th EAI International Conference on Big data and Cloud Computing Challenges at Vandalur, Kelambakkam high road chennai Tamil Nadu India - Mar 8 - 9, 2018
DownStream: Solutions for Post Processing PCB Designs
Verific: SystemVerilog & VHDL Parsers
TrueCircuits: IoTPLL



Internet Business Systems © 2018 Internet Business Systems, Inc.
25 North 14th Steet, Suite 710, San Jose, CA 95112
+1 (408) 882-6554 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise