Sonics Upgrades SoC Development Environment And Flagship NoC To Improve Chip Architecture Optimization And SoC Resiliency

Static Performance Analysis Speeds Network and SoC Configuration; Timeout Error Detection Accelerates System Bring Up

MILPITAS, Calif., Nov. 17, 2015 — (PRNewswire) — Sonics, Inc., the world's foremost supplier of on-chip network (NoC) technologies and services, today introduced new versions of its SonicsStudio® system-on-chip (SoC) development environment and SonicsGN® NoC. Sonics has enhanced the Director graphical user interface in SonicsStudio release 8.1 to be more responsive with larger SoC designs and to deliver fast, static performance analysis that aids designers in optimizing their SoC architecture to satisfy their application requirements across the full range of system use cases. SonicsGN release 3.1 includes new timeout error detection capability that identifies IP cores that fail to accept or complete their required transactions. Such error conditions typically result from either software defects in IP core programming or transient hardware failures. In addition, Sonics has improved its legacy interface support for ARM AMBA-based SoC designs.

"The best time to ensure that chips perform to specification is early in the architecture stage of development," said Drew Wingard, CTO of Sonics. "Much like static timing analysis, static performance analysis provides a big jump forward for SonicsStudio users to explore, refine, and optimize their chip architecture to meet performance specifications before they get into detailed RTL or SystemC simulation. The tool shows designers exactly where the opportunities exist to refine their chosen network topology or optimize the links between network nodes in their SoC for better throughput. Adding timeout error detection to our SonicsGN hardware helps to both accelerate the software bring up process and increase SoC resiliency against hardware failures."

Sonics has upgraded the SonicsStudio development environment with calculations that statically predict the performance capacities of the SoC architect's chosen network configuration. For each of the system use case scenarios, the architect describes the associated throughput characteristics and requirements either in a structured table or by automatically extracting that information from the simulation stimulus for that use case. SonicsStudio produces a set of report tables that compare the network's configured capacity versus the required throughput and highlights any discrepancies, together with their cause. This information is invaluable in guiding the architect to re-optimize the network to achieve performance requirements with minimum area.

By leveraging the same use case data that designers capture to automatically generate performance simulations, Sonics can statically characterize the chip performance before the simulations are ever run. Static analysis is much faster than simulation and more importantly, directly identifies the performance limitations and improvement opportunities for the user. This greatly reduces the number of iterations during the architecture phase and shortens the amount of time needed to achieve a design configuration that meets performance requirements.

Sonics has also upgraded SonicsGN to provide timeout error detection at the network level that avoids "hanging" conditions for IP components other than processor cores, which typically have their own timeout safeguards. Timeout detection as a class of error detection is important in making distributed, heterogeneous SoCs more resilient, particularly in applications that need high reliability. It is also valuable in debugging the initial bring up of driver software on an SoC because such low-level code may incorrectly program IP cores to an unsupported state, often causing the system to "hang."

Finally, Sonics has updated its support for legacy ARM AMBA interfaces in the SonicsStudio design environment as well as the SonicsGN NoC. SonicsStudio now includes full support for the ARM AHB protocol with performance-oriented transactor models at both the master and slave side. SonicsGN now features improved support for the APB interface.

SonicsStudio 8.1 and SonicsGN 3.1 are available now. Contact your Sonics sales representative for more information.

About Sonics, Inc.
Sonics, Inc. (Milpitas, Calif.) is the trusted leader in on-chip network (NoC) and power-management technologies used by the world's top semiconductor and electronics product companies, including Broadcom®, Intel®, Marvell®, MediaTek, and Microchip®. Sonics was the first company to develop and commercialize NoCs, accelerating volume production of complex systems-on-chip (SoC) that contain multiple processor cores. Sonics' ICE-Grain Power Architecture is the IP industry's first complete power management solution, which enables SoC designers to exploit "dark silicon" states to save more energy than conventional software-based approaches. Sonics is also a catalyst for ongoing discussions about design methodology change via the  Agile IC Methodology LinkedIn group. Sonics holds approximately 150 patent properties supporting customer products that have shipped more than four billion SoCs. For more information, visit  sonicsinc.com, and follow us on Twitter ( @ sonicsinc) and LinkedIn.

PRESS RELEASE
Contact: Erica Harbison
McClenahan Bruer
Email Contact | 503.546.1013

 

To view the original version on PR Newswire, visit: http://www.prnewswire.com/news-releases/sonics-upgrades-soc-development-environment-and-flagship-noc-to-improve-chip-architecture-optimization-and-soc-resiliency-300169051.html

SOURCE Sonics, Inc.

Contact:
Sonics, Inc.
Web: http://sonicsinc.com




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