Beijing Pinecone Licenses Arteris FlexNoC Interconnect IP for Smartphone Application Processors

Leading-edge multi-channel DDR and memory interleaving support reduces system-on-chip power consumption and development time

CAMPBELL, Calif. — Arteris Inc., the inventor and only supplier of silicon-proven commercial  network-on-chip (NoC) interconnect IP solutions, today announced that Beijing Pinecone Electronics Co., Ltd, has licensed  Arteris FlexNoC IP for use in its smartphone application processor chipsets.

“We chose to adopt Arteris FlexNoC interconnect IP for our SoCs after a very rigorous evaluation process.,” said Yuanbo Ye, Vice President, at Beijing Pinecone Electronics.

“We are thrilled that the Beijing Pinecone team selected us after such a demanding evaluation,” said K. Charles Janac, President and CEO of Arteris. “This design win highlights not only the clear technical benefits of using Arteris FlexNoC IP, but also the economic benefits in product development time and cost.”

About Arteris

Arteris, Inc. provides  Network-on-Chip interconnect IP and tools to accelerate System-on-Chip semiconductor (SoC) assembly for a wide range of applications. Rapid semiconductor designer adoption by customers such as  SamsungAltera, and  Texas Instruments has resulted in Arteris being the only semiconductor IP company to be ranked in the Inc. 500 and Deloitte Technology Fast 500 lists in 2012 and 2013. Customer results obtained by using the Arteris product line include lower power, higher performance, more efficient design reuse and faster SoC development, leading to lower development and production costs. More information can be found at  www.arteris.com.

About Beijing Pinecone Electronics Co., Ltd.

Beijing Pinecone Electronics Co., Ltd, a fast-growing IC design house, aims to provide core power for smartphones and the fun of technology to everyone. 


Contact:

Kurt Shuler
Arteris Inc.
+1 408 470 7300
kurt.shuler@arteris.com




Review Article Be the first to review this article
Featured Video
Editorial
Peggy AycinenaWhat Would Joe Do?
by Peggy Aycinena
Job Openings: Can EDA Predict the Future
More Editorial  
Jobs
Timing Design Engineer(Job Number: 17001757) for Global Foundaries at Santa Clara, CA
ASIC Design Engineer 2 for Ambarella at Santa Clara, CA
Engr, Elec Des 2 for KLA-Tencor at Milpitas, CA
Verification Engineer for Ambarella at Santa Clara, CA
Technical Support Engineer for EDA Careers at Freemont, CA
ASIC Design Engineer for Ambarella at Santa Clara, CA
Upcoming Events
CDNLive Silicon Valley 2017 at Santa Clara Convention Center Santa Clara CA - Apr 11 - 12, 2017
10th Anniversary of Cyber-Physical Systems Week at Pittsburgh, PA, USA PA - Apr 18 - 21, 2017
DVCon 2017 China, April 19, 2017, Parkyard Hotel Shanghai, China at Parkyard Hotel Shanghai Shanghai China - Apr 19, 2017
Zuken Innovation World 2017 at Hilton Head Marriott Resort & Spa Hilton Head Island NC - Apr 24 - 26, 2017
S2C: FPGA Base prototyping- Download white paper



Internet Business Systems © 2017 Internet Business Systems, Inc.
595 Millich Dr., Suite 216, Campbell, CA 95008
+1 (408)-337-6870 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy Policy