Renesas Enables Development of High-Performance Linux and Android HMI Applications with New RZ/G Series MPUs with Support for 3-D Graphics and Multiple-Image Processing

(Remarks) ARM and Cortex are registered trademarks of ARM Limited (or its subsidiaries) in the EU and in other countries. PowerVR™ is a registered trademark of Imagination Technologies Limited (or its subsidiaries) in the EU and in other countries. All registered trademarks or trademarks are the property of their respective owners.

Separate Sheet

Product Specifications of the RZ/G1E and RZ/G1M

Series name         RZ/G

Group name

(Product name)

 

       

RZ/G1E

(R8A77450HA01BG)

       

RZ/G1M

(R8A77430HA01BG)

Power supply voltage

        3.3/1.8 V (IO)、1.5 V (DDR3)、1.03 V (Core)         3.3/1.8 V (IO)、1.35 V (DDR3L)、1.03 V (Core)
CPU core         ARM® Cortex®-A7, dual-core         ARM® Cortex®-A15, dual-core
Max. operating

frequency

        1.0GHz         1.5GHz
Processing performance         3800DMIPS         10500DMIPS
Cache memory         • L1 instruction cache: 32 KB

• L1 data cache: 32 KB

• L2 cache: 512 MB

        • L1 instruction cache: 32 KB

• L1 data cache: 32 KB

• L2 cache: 1 MB

External memory        

• Ability to connect DDR3-SDRAM via DDR dedicated bus

• Max. operating frequency: 533MHz

• Data bus width: 32 bits

        • Ability to connect DDR3L-SDRAM via DDR dedicated bus

• Max. operating frequency: 800MHz

• Data bus width: 32 bits × 2 channels

External expansion         • Ability to connect -ash ROM or SRAM directly

• Data bus width: 8/16 bits

        • Ability to connect fash ROM or SRAM directly

• Data bus width: 8/16 bits

• PCI Express 2.0 (1 lane)

3D graphics         PowerVR™SGX540         PowerVR™SGX544MP2
Video functions         • Video display interface × 2 channels( RGB888)

• Video input interface × 2 channels

• Video codec module: VCP3

• IP converter module

• Video image processing functions

(color conversion, image enlargement/reduction, filtering)

        • Video display interface × 2 channels

(1 channel: LVDS, 1 channel: RGB888)

• Video input interface × 3 channels

• Video codec module: VCP3

• IP converter module

• Video image processing functions

(color conversion, image enlargement/reduction, filtering)

Audio functions         • Sampling rate converter × 6 channels

• Serial sound interface × 10 channels

        • Sampling rate converter × 10 channels

• Serial sound interface × 10 channels

Storage interfaces         • USB 2.0 host interface × 2 ports (wPHY)

• SD host interface × 3 channels

(SDXC and UHS-I support)

• Multimedia card interface × 1 channel

        • USB 3.0 host interface × 1 port (wPHY)

• USB 2.0 host interface × 2 ports (wPHY)

• SD host interface × 3 channels

(SDXC and UHS-I support)

• Multimedia card interface × 1 channel

• Serial ATA interface × 2 channels

Other peripheral

functions

        • 32-bit timer × 12 channels

• PWM timer × 7 channels

• I2C bus interface × 8 channels

• Serial communication interface

(SCIF) × 15 channels

• Quad serial peripheral interface

(QSPI) × 1 channel (boot support)

• Clock-synchronous serial interface

(MSIOF) × 3 channels (SPI/IIS support)

• Ethernet controller with AVB support (support for IEEE 802.1BA, IEEE 802.1AS, IEEE 802.1Qav, and IEEE 1722, GMII/MII interface, PHY device connection support)

• Ethernet controller (IEEE 802.3u–compliant MAC on-chip, RMII interface, ability to connect to PHY device)

• Controller area network (CAN) interface × 2 channels

• Interrupt controller (INTC)

• Clock generator (CPG): on-chip PLL

• On-chip debug function

        • 32-bit timer × 12 channels

• PWM timer × 7 channels

• I2C bus interface × 9 channels

• Serial communication interface

(SCIF) × 15 channels

• Quad serial peripheral interface

(QSPI) × 1 channel (boot support)

• Clock-synchronous serial interface

(MSIOF) × 3 channels (SPI/IIS support)

• Ethernet controller with AVB support (support for IEEE 802.1BA, IEEE 802.1AS, IEEE 802.1Qav, and IEEE 1722, GMII/MII interface, PHY device connection support)

• Ethernet controller (IEEE 802.3u–compliant MAC on-chip, RMII interface, ability to connect to PHY device)

• Controller area network (CAN) interface × 2 channels

• Interrupt controller (INTC)

• Clock generator (CPG): on-chip PLL

• On-chip debug function

Package         501 pin FCBGA (21mm x 21mm)         831 pin FCBGA (27mm × 27mm)
               




Review Article Be the first to review this article
Featured Video
Editorial
Peggy AycinenaWhat Would Joe Do?
by Peggy Aycinena
Qualcomm’s Lu Dai: Energetic leadership for Accellera
More Editorial  
Jobs
Sr. Staff Design SSD ASIC Engineer for Toshiba America Electronic Components. Inc. at San Jose, CA
SOC Logic Design Engineer for Global Foundaries at Santa Clara, CA
Principal Engineer FPGA Design for Intevac at Santa Clara, CA
Technical Support Engineer for EDA Careers at Freemont, CA
Development Engineer-WEB SKILLS +++ for EDA Careers at North Valley, CA
Upcoming Events
IoT Summit 2017 at Great America ballroom, Santa Clara Convention Center Santa Clara CA - Mar 16 - 17, 2017
SNUG Silicon Valley 2017 at Santa Clara Convention Center Santa Clara CA - Mar 22 - 23, 2017
CDNLive Silicon Valley 2017 at Santa Clara Convention Center Santa Clara CA - Apr 11 - 12, 2017
10th Anniversary of Cyber-Physical Systems Week at Pittsburgh, PA, USA PA - Apr 18 - 21, 2017



Internet Business Systems © 2017 Internet Business Systems, Inc.
595 Millich Dr., Suite 216, Campbell, CA 95008
+1 (408)-337-6870 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy Policy