Analog Bits to present half-power, multi-protocol SERDES at TSMC Open Innovation Platform® Ecosystem Forum

Santa Clara, CA – Analog Bits (www.analogbits.com), will be presenting the latest in low-power, multi-standard SERDES products at the TSMC Open Innovation Platform (OIP) Ecosystem Forum. These licensable IP solutions can reduce power SERDES consumption by 50% and more over other alternatives, while concurrently supporting multiple standards such as PCIe Gen3/4, HMC 2.0, 10G-KR and others - across a range of speeds. These products simplify SOC integration for multi-standard applications while also dramatically reducing power consumption, reducing risk and providing increased product flexibility. Furthermore, Analog Bits will be demonstrating IP products designed for TSMC’s 16nm FinFET process technology.

WHAT: Half-power, multi-protocol SERDES IP

products SERDES IP Products

• Half-power SERDES IP supporting PCIe Gen 3/4, HMC 2.0, 10G-KR

Clocking IP Products

• Wide range, Fine resolution and Customizable PLL & DLL IP cores

Sensors IP Products

• On-die sensors for real-time monitoring of Process, Voltage and Temperature (PVT)

WHEN:

September 17, 2015

WHERE:

11:00 - 11:30AM: IP Track: Case Study of 16FF+ Half Power, Multi-Protocol SERDES

9:00 - 6:30PM: Demonstration of Half Power SERDES at Booth 602

TSMC 2015 Open Innovation Platform Ecosystem Forum

Santa Clara Convention Center 5001

Great America Parkway

Santa Clara, CA 95054

About Analog Bits:

Founded in 1995, Analog Bits, Inc. (www.analogbits.com), is the leading supplier of mixed-signal IP with a reputation for easy and reliable integration into advanced SOCs. Products include precision clocking macros such as PLLs & DLLs, programmable interconnect solutions such as multi-protocol SERDES and programmable I/O’s as well as specialized memories such as high-speed SRAMs and TCAMs. With billions of IP cores fabricated in customer silicon, from 0.35-micron to 16/14-nm processes, Analog Bits has an outstanding heritage of "first-time-working” with foundries and IDMs.


Contact:

Will Wong 
650-314-0200
will@analogbits.com




Review Article Be the first to review this article
Featured Video
Editorial
Peggy AycinenaWhat Would Joe Do?
by Peggy Aycinena
Job Openings: Can EDA Predict the Future
More Editorial  
Jobs
Technical Support Engineer for EDA Careers at Freemont, CA
Timing Design Engineer(Job Number: 17001757) for Global Foundaries at Santa Clara, CA
Senior FPGA Designer for Fidus Electronic Product Development at Fremont, CA
Engr, Elec Des 2 for KLA-Tencor at Milpitas, CA
ASIC Design Engineer for Ambarella at Santa Clara, CA
Upcoming Events
CDNLive Silicon Valley 2017 at Santa Clara Convention Center Santa Clara CA - Apr 11 - 12, 2017
10th Anniversary of Cyber-Physical Systems Week at Pittsburgh, PA, USA PA - Apr 18 - 21, 2017
DVCon 2017 China, April 19, 2017, Parkyard Hotel Shanghai, China at Parkyard Hotel Shanghai Shanghai China - Apr 19, 2017
Zuken Innovation World 2017 at Hilton Head Marriott Resort & Spa Hilton Head Island NC - Apr 24 - 26, 2017
S2C: FPGA Base prototyping- Download white paper



Internet Business Systems © 2017 Internet Business Systems, Inc.
595 Millich Dr., Suite 216, Campbell, CA 95008
+1 (408)-337-6870 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy Policy