Analog Bits to present half-power, multi-protocol SERDES at TSMC Open Innovation Platform® Ecosystem Forum

Santa Clara, CA – Analog Bits (, will be presenting the latest in low-power, multi-standard SERDES products at the TSMC Open Innovation Platform (OIP) Ecosystem Forum. These licensable IP solutions can reduce power SERDES consumption by 50% and more over other alternatives, while concurrently supporting multiple standards such as PCIe Gen3/4, HMC 2.0, 10G-KR and others - across a range of speeds. These products simplify SOC integration for multi-standard applications while also dramatically reducing power consumption, reducing risk and providing increased product flexibility. Furthermore, Analog Bits will be demonstrating IP products designed for TSMC’s 16nm FinFET process technology.

WHAT: Half-power, multi-protocol SERDES IP

products SERDES IP Products

• Half-power SERDES IP supporting PCIe Gen 3/4, HMC 2.0, 10G-KR

Clocking IP Products

• Wide range, Fine resolution and Customizable PLL & DLL IP cores

Sensors IP Products

• On-die sensors for real-time monitoring of Process, Voltage and Temperature (PVT)


September 17, 2015


11:00 - 11:30AM: IP Track: Case Study of 16FF+ Half Power, Multi-Protocol SERDES

9:00 - 6:30PM: Demonstration of Half Power SERDES at Booth 602

TSMC 2015 Open Innovation Platform Ecosystem Forum

Santa Clara Convention Center 5001

Great America Parkway

Santa Clara, CA 95054

About Analog Bits:

Founded in 1995, Analog Bits, Inc. (, is the leading supplier of mixed-signal IP with a reputation for easy and reliable integration into advanced SOCs. Products include precision clocking macros such as PLLs & DLLs, programmable interconnect solutions such as multi-protocol SERDES and programmable I/O’s as well as specialized memories such as high-speed SRAMs and TCAMs. With billions of IP cores fabricated in customer silicon, from 0.35-micron to 16/14-nm processes, Analog Bits has an outstanding heritage of "first-time-working” with foundries and IDMs.


Will Wong 

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