eSilicon's Javier DeLaCruz to Present: Cost Structure Advantages of 2.5D Integration

SAN JOSE, CA -- (Marketwired) -- Apr 29, 2015 --


Who:
Javier DeLaCruz, eSilicon's senior director of product strategy

What:
IMAPS NE 42nd Symposium & Expo
2015

Where:
Holiday Inn Conference Center
242 Adams
Boxborough, Massachusetts 01719

When:
May 5, 2015
10:40 AM

Abstract
Various market dynamics are influencing the adoption of 2.5D integration. Recent developments have enabled 2.5D to provide feature enhancements, but if applied well may also provide significant cost benefits over what can be otherwise executed.

About Javier DeLaCruz
As a senior director of product strategy at eSilicon Corporation, Javier DeLaCruz is responsible for roadmap development of enabling technologies. This includes 2.5D integration, IoT, advanced packaging and interface development. Before joining eSilicon, Javier held various technical and management positions at Multilink Technology Corp, STATS and M/A-COM. Javier holds a Bachelor of Engineering from Stevens Institute of Technology, a Masters of Science from Boston University and an MBA from Babson College.

About eSilicon
eSilicon, a leading independent semiconductor design and manufacturing solutions provider, delivers custom ICs and custom IP to OEMs, independent device manufacturers (IDMs), fabless semiconductor companies (FSCs) and wafer foundries through a fast, flexible, lower-risk, automated path to volume production. eSilicon serves a wide variety of markets including communications, computer, consumer, industrial products and medical. www.esilicon.com

eSilicon -- Enabling Your Silicon Success™

eSilicon is a registered trademark, and the eSilicon logo and Enabling Your Silicon Success are trademarks, of eSilicon Corporation. Other trademarks are the property of their respective owners.

For more information, please contact:
Sally Slemons 
eSilicon Corporation 
408.635.6409 

Email Contact

Susan Cain 
Cain Communications 
408.393.4794

Email Contact 





Review Article Be the first to review this article
Featured Video
Editorial
Peggy AycinenaWhat Would Joe Do?
by Peggy Aycinena
Job Openings: Can EDA Predict the Future
More Editorial  
Jobs
Senior FPGA Designer for Fidus Electronic Product Development at Fremont, CA
Technical Support Engineer for EDA Careers at Freemont, CA
Timing Design Engineer(Job Number: 17001757) for Global Foundaries at Santa Clara, CA
Lead Java Platform Engineer IOT-WEB for EDA Careers at San Francisco Area, CA
ASIC Design Engineer 2 for Ambarella at Santa Clara, CA
Upcoming Events
CDNLive Silicon Valley 2017 at Santa Clara Convention Center Santa Clara CA - Apr 11 - 12, 2017
10th Anniversary of Cyber-Physical Systems Week at Pittsburgh, PA, USA PA - Apr 18 - 21, 2017
DVCon 2017 China, April 19, 2017, Parkyard Hotel Shanghai, China at Parkyard Hotel Shanghai Shanghai China - Apr 19, 2017
Zuken Innovation World 2017 at Hilton Head Marriott Resort & Spa Hilton Head Island NC - Apr 24 - 26, 2017
S2C: FPGA Base prototyping- Download white paper



Internet Business Systems © 2017 Internet Business Systems, Inc.
595 Millich Dr., Suite 216, Campbell, CA 95008
+1 (408)-337-6870 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy Policy