Rambus Develops R+™ DDR4/3 PHY on Samsung 28nm LPP Process

Design achieves both high-performance and high-efficiency for networking, computing, and consumer applications

SUNNYVALE, Calif. — (BUSINESS WIRE) — February 10, 2015 — Rambus Inc. (NASDAQ: RMBS) today announced it has developed an R+™ DDR4/3 PHY on the Samsung 28nm LPP process. Through the collaboration with Samsung, Rambus has achieved a robust, production-ready R+ DDR4/3 PHY on the power-performance optimized 28nm Low Power Plus (LPP) process. The Rambus design has been characterized at a system level, and can be easily integrated into a SoC.

“With the ongoing demand for data alongside the cloud driving more and more networking, the need for faster speeds and better bandwidth has never been more prevalent,” said Kevin Donnelly, general manager of the Memory and Interface division at Rambus. “Successfully taping out a production-ready R+ DDR4/3 PHY on the Samsung 28nm LPP process is a major step in our strategic and valued partnership. Together we are breaking the necessary ground to achieve the best possible speeds and bandwidth required by today’s consumer and networking devices.”

The Rambus R+ DDR4 multi-modal memory PHY enables customers to differentiate their offerings by providing industry-leading performance while maintaining full compatibility with industry standard DDR4, and DDR3 interfaces. Designed for server, compute, networking and consumer applications, the R+ DDR4 PHY delivers versatile configuration options for both area/power optimized consumer applications and performance intensive compute applications. The DDR4 IP product supports data rates from 800 to 3200Mbps in a low-power process and is available in both PoP and discrete packages.

“Our high-volume 28nm LPP technology gives SoC designers a robust manufacturing option for a new generation of feature-rich consumer devices,” said Shawn Han, Vice President of Foundry Marketing, Samsung. “We are pleased to be collaborating with Rambus to demonstrate the capabilities of Samsung's 28nm processes and the design enablement ecosystem available for Samsung’s foundry customer and IP partners.”

The R+ DDR4/3 design leverages the wide range of design enablement support and expertise that Samsung offers, including process design kits (PDKs), DFM kits, analog mixed signal reference flow, extensive implementation services, and silicon proven logic libraries. Rambus also utilized Samsung’s foundry assembly support resources to provide a flip-chip packaging option on the high speed PHY design. In addition, Samsung’s 28nm Low-Power (LP) Gate First High-k Metal Gate (HKMG) process offers considerable power and performance advantages to a growing spectrum of mobile, consumer and IT infrastructure-computing applications.

RMBSTN

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About Rambus Inc.

Rambus brings invention to market. Our customizable IP cores, architecture licenses, tools, services, and training improve the competitive advantage of our customer’s products while accelerating their time-to-market. Rambus products and innovations capture, secure and move data. For more information, visit rambus.com.



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