Altera to Demonstrate FPGA Technologies at Flash Memory Summit 2014

Altera Helps Accelerate Servers and Virtualize Storage and Memory in the Data Center

SAN JOSE, Calif., Aug. 4, 2014 — (PRNewswire) —  Altera Corporation (NASDAQ: ALTR) today announced it will demonstrate its programmable logic technology and present in multiple technology sessions at the Flash Memory Summit at the Santa Clara Convention Center, taking place August 5 to 7, 2014. Attendees can stop by the Altera booth #621 to learn more about using field programmable gate arrays (FPGAs) as accelerators in the data center and to enable storage and memory virtualization. Altera representatives will also offer tutorials on high performance flash applications over the three-day-long event.

Altera(R) programmable solutions enable designers of electronic systems to rapidly and cost effectively innovate, differentiate and win in their markets. Altera offers FPGAs, SoCs, CPLDs, ASICs and complementary technologies, such as power management, to provide high-value solutions to customers worldwide.

Altera's portfolio of FPGA and SoC solutions for flash and emerging memory applications can be programmed to meet enterprise Big Data and analytics storage requirements. Arria® 10 SoCs are also the industry's only 20 nm device that integrates a hardened ARM processor system into the FPGA fabric. Altera FPGAS and SoCs provide a parallel architecture aids in the acceleration of processing algorithms, while the Altera SDK for OpenCL design tool offers easy implementations of parallel processing applications onto FPGAs.

Altera FPGAs provide high-performance, low-power alternatives with optimum flexibility for developing flash memory applications. Altera booth demos will show new ways to use FPGAs to enable:

  • Non-volatile DIMMs and memories
  • Large scale flash arrays
  • High speed, low latency IO interfaces and protocols
  • High speed, low latency NVMe solutions, the specification for accessing solid-state drives (SSD) attached through the PCI Express (PCIe) bus.
  • SSD controllers as part of a highly-configurable solution that can be targeted for different flash capacity and performance requirements

Altera partner, Everspin Technologies, will also demonstrate porting its ST-MRAM to Altera's Stratix® FPGA family showcasing high reliability and ultra low latency which offers customers the combined benefits of both Flash and DRAM – improved application performance, data security, system crash recovery time and SSD reliability.

Altera Panels, Tutorials, and Training
Learn more about how FPGAs can enable your designs by attending the following sessions.

About Altera
Altera® programmable solutions enable designers of electronic systems to rapidly and cost effectively innovate, differentiate and win in their markets. Altera offers FPGAs, SoCs, CPLDs, ASICs and complementary technologies, such as power management, to provide high-value solutions to customers worldwide. Visit www.Altera.com

ALTERA, ARRIA, CYCLONE, ENPIRION, MAX, MEGACORE, NIOS, QUARTUS and STRATIX words and logos are trademarks of Altera Corporation and registered in the U.S. Patent and Trademark Office and in other countries. All other words and logos identified as trademarks or service marks are the property of their respective holders as described at  www.altera.com/legal

Editor Contact:
Karin Taylor
Altera Corporation
(408) 544-8207
Email Contact

Logo - http://photos.prnewswire.com/prnh/20101012/SF78952LOGO

SOURCE Altera Corporation

Contact:
Altera Corporation
Web: http://www.altera.com




Review Article Be the first to review this article
Featured Video
Editorial
Peggy AycinenaWhat Would Joe Do?
by Peggy Aycinena
Job Openings: Can EDA Predict the Future
More Editorial  
Jobs
Timing Design Engineer(Job Number: 17001757) for Global Foundaries at Santa Clara, CA
Verification Engineer for Ambarella at Santa Clara, CA
Test Development Engineer(Job Number: 17001697) for Global Foundaries at Santa Clara, CA
Senior FPGA Designer for Fidus Electronic Product Development at Fremont, CA
ASIC Design Engineer 2 for Ambarella at Santa Clara, CA
ASIC Design Engineer for Ambarella at Santa Clara, CA
Upcoming Events
CDNLive Silicon Valley 2017 at Santa Clara Convention Center Santa Clara CA - Apr 11 - 12, 2017
10th Anniversary of Cyber-Physical Systems Week at Pittsburgh, PA, USA PA - Apr 18 - 21, 2017
DVCon 2017 China, April 19, 2017, Parkyard Hotel Shanghai, China at Parkyard Hotel Shanghai Shanghai China - Apr 19, 2017
Zuken Innovation World 2017 at Hilton Head Marriott Resort & Spa Hilton Head Island NC - Apr 24 - 26, 2017
S2C: FPGA Base prototyping- Download white paper



Internet Business Systems © 2017 Internet Business Systems, Inc.
595 Millich Dr., Suite 216, Campbell, CA 95008
+1 (408)-337-6870 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy Policy