Toshiba Launches 4A Output Smart Gate Driver Photocoupler with Embedded Protection Features

TOKYO — (BUSINESS WIRE) — May 20, 2014Toshiba Corporation’s (TOKYO:6502) Semiconductor & Storage Products Company today announced a new addition to its line-up of gate-drive photocouplers for use in driving medium-power IGBTs and power MOSFETs. The new 4A output smart gate driver photocoupler “TLP5214” is housed in a thin SO16L package and has protection features that prevent IGBTs from over-current conditions. Mass production shipments of the new product will start from the end of May.

Toshiba: Smart Gate Driver Photocoupler with Embedded Protection Features (Photo: Business Wire)

Toshiba: Smart Gate Driver Photocoupler with Embedded Protection Features (Photo: Business Wire)

“TLP5214” integrates multiple protection features, IGBT desaturation detection, active miller clamp and FAULT detection among them. Integrating these protection features, previously in external circuits, contribute to a lower overall system cost for detecting and handling malfunctions.

With the thin SO16L package, in spite of its low height of 2.3mm (max), “TLP5214” guarantees a creepage distance of 8mm, suiting it for applications requiring higher isolation specs.

Combined with Toshiba’s original high-reliability infrared LED, TLP5214 is suitable for use in a wide range of applications, including those that require high thermo-stability, such as factory automation, home photovoltaic power systems and UPS. A maximum propagation delay time of 150ns and propagation delay skew of ±80ns are guaranteed within the defined operation temperature range (up to 110 degrees Centigrade), making it possible to reduce dead time in the inverter circuit, which can secure higher operating efficiency.


Key Specifications of the New Product

Part Number   TLP5214


  Peak Output Current ±4.0A (max)
Total Output Supply Voltage 15V ~ 30V
Supply Current 3.5mA (max)
Threshold Input Current 3350(L/H) 6mA (max)


Propagation Delay Time 150ns (max)
Propagation Delay Skew -80ns ~ 80ns


IGBT Desaturation Detection DESAT Threshold Voltage : 6.5V (typ.)
Soft Turn-off DESAT Sense to 10% Delay : 3.5μs (typ.)
Miller clamping (Off-state) Clamp Pin Threshold Voltage: 3.0V (typ.)
Undervoltage Lockout (UVLO) V UVLO +  : 11.6V (typ.)

V UVLO -   : 10.3V (typ.)

Isolation Isolation Voltage 5000 Vrms (min.)
Clearance 8.0 mm (min.)
Creepage Distance 8.0 mm (min.)
  Insulation Thickness   0.4 mm (min.)

1 | 2  Next Page »

Review Article Be the first to review this article


Featured Video
Peggy AycinenaWhat Would Joe Do?
by Peggy Aycinena
Acquiring Mentor: Four Good Ideas, One Great
More Editorial  
SENIOR ASIC Design Engineer for TiBit Communications at Petaluma, CA
Sr. staff ASIC Design Engineer -2433 for Microchip at San Jose, CA
Manager, Field Applications Engineering for Real Intent at Sunnyvale, CA
Upcoming Events
DeviceWerx - 2016 at Green Valley Ranch Casino & Resort Las Vegas NV - Nov 3 - 4, 2016
2016 International Conference On Computer Aided Design at Doubletree Hotel Austin TX - Nov 7 - 10, 2016
ICCAD 2016, Nov 7-10, 2016 at Doubletree Hotel in Austin, TX at Doubletree Hotel Austin TX - Nov 7 - 10, 2016
Electric&Hybrid Aerospace Technology Symposium 2016 at Conference Centre East. Koelnmesse (East Entrance) Messeplatz 1 Cologne Germany - Nov 9 - 10, 2016
S2C: FPGA Base prototyping- Download white paper

Internet Business Systems © 2016 Internet Business Systems, Inc.
595 Millich Dr., Suite 216, Campbell, CA 95008
+1 (408)-337-6870 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy Policy