MoSys to Demonstrate Low Latency Serial Memory FPGA Interface at 14G and 25G PHY Technology for Data Path Applications at DesignCon 2014

Bandwidth Engine and LineSpeed Products Enable Greater Intelligence and Datapath Density for 100G, 400G and Terabit Networking Systems

SANTA CLARA, Calif. — (BUSINESS WIRE) — January 28, 2014 — MoSys, Inc. (NASDAQ: MOSY):

Who:

   

MoSys (NASDAQ: MOSY), a leader in semiconductor solutions that enable fast, intelligent data access for network and communications systems, is exhibiting at DesignCon 2014, booth #520. The company will demonstrate its ability to eliminate memory access bottlenecks in high-performance networking systems, achieving an industry leading 14+ Gigabits per second serial interface across a highly efficient 16 lane GigaChip™ Interface using MoSys® Bandwidth Engine® discrete chip solution connected to a Xilinx® Virtex®-7 FPGA over 10 inches of trace and a mezzanine connector.

 

A second demonstration will showcase the 100G data path capability of MoSys’ LineSpeed™ 100G PHY solutions performing full-duplex 4x25G traffic over two meters of passive QSFP copper cable from FCI. Passive copper cable interconnect is the lowest power and lowest cost solution in this distance range.

 

In a third example application, MoSys and FCI will demonstrate the extended reach ability of the LineSpeed SerDes PHY technology by driving high-speed signal transmissions at 25/28G across an ExaMAX® Direct Mate Orthogonal (DMO) connector and an FCI backplane using a MoSys LineSpeed gearbox (MSH310).

 
LineSpeed PHY solutions support high-density 10G, 40G and 100G OTN and Ethernet interfaces for networking line cards, backplanes, copper cables and optical modules requiring high-density 100G capacity. More information about FCI’s high speed IO products and solutions can be found at the FCI website or by visiting the FCI booth #403 at the DesignCon 2014 Expo.
 

What:

Taking place annually in Silicon Valley, DesignCon is the premier educational conference and technology exhibition for electronic design engineers in the high speed communications and semiconductor communities.
 

When:

DesignCon 2014 takes place January 28-31, 2014; Expo is January 29-30, 2014.
 

Where:

Santa Clara Convention Center
5001 Great America Parkway
Santa Clara, California 95054
 
MoSys’ demonstrations and product information will be available at MoSys booth #520. The MoSys-FCI joint demonstration will be available at FCI booth #403.
 

1 | 2  Next Page »



Review Article Be the first to review this article
SI2

AMIQ: dvteclipse

Featured Video
Editorial
Peggy AycinenaIP Showcase
by Peggy Aycinena
Grant Pierce: Grand Challenges in IP
More Editorial  
Jobs
Technical Support Engineer for EDA Careers at Freemont, CA
LVS for PDK Design Engineer SILICON VALLEY for EDA Careers at San Jose, CA
LVS PEX DESIGN ENGINEERS SILICON VALLEY for EDA Careers at San Jose, CA
Upcoming Events
EMC PCB Design Integration at 13727 460 Ct SE North Bend WA - Jun 6 - 9, 2017
DAC 2017 Conference at Austin TX - Jun 18 - 22, 2017
2017 FLEX Conference at Monterey Conference Center 1 Portola Plaza, Monterey CA - Jun 19 - 22, 2017
MPSoc Forum 2017 - July 2 - 7, 2017, Les Tresoms Hotel, Annecy, France at Les Tresoms Hotel Annecy France - Jul 2 - 7, 2017
NEC: CyberWorkbench
Verific: SystemVerilog & VHDL Parsers
DownStream: Solutions for Post Processing PCB Designs
DAC2017



Internet Business Systems © 2017 Internet Business Systems, Inc.
595 Millich Dr., Suite 216, Campbell, CA 95008
+1 (408)-337-6870 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy Policy