Tensilica Unveils Groundbreaking Next-Generation Xtensa LX Processor Core; Industry's Highest Performance Core Will Replace RTL in SOC Designs


Pricing and Availability

Tensilica's pricing structure is based on a licensing fee per processor instance plus royalties based on the volume of processors manufactured. Each licensed processor instance can be targeted to any silicon foundry technology. Licensing fees for a single processor configuration start at $550,000 for the Xtensa LX processor including the Vectra LX DSP engine. The Xtensa Software Developers Toolkit, which includes the Xtensa Xplorer development environment, Xtensa C/C++ compiler, and Xtensa Instruction Set Simulator; and TIE Compiler are priced separately. Customers can begin to take advantage of the new features of the Xtensa LX processor early this summer.

Xtensa LX is an addition to the Tensilica processor family, which includes the proven Xtensa V configurable processor. Customers will be able to continue to license the Xtensa V processor. The Xtensa V processor and the Xtensa LX processor both implement the common core Xtensa instruction set.

About Tensilica

Tensilica was founded in July 1997 to address the growing need for optimized, application-specific microprocessors for high-volume embedded applications. With the Xtensa and Xtensa LX configurable and extensible microprocessor cores, Tensilica is the only company that has automated and patented the time-consuming process of generating a customized microprocessor core along with a complete software-development tool environment, producing new configurations in a matter of hours. These customized processors rival hand-coded RTL in performance and add a needed level of programmability. For more information, visit www.tensilica.com.

(1) The BDTIsimMark2000(TM) provides a summary measure of DSP speed. For more information and scores see www.BDTI.com. Scores (C) 2004 BDTI. The Xtensa LX score includes use of 12 custom TIE instructions that expand the area of the core by 16%. Licensees may require greater or lesser degrees of customization. The scores for all other cores assume that no coprocessors or other customizations were used. The scores for the Xtensa LX and all other cores are for worst case operating conditions in a commercially available 130 nm process. Contact info@BDTI.com for more information.

Editors' Notes:

-- Tensilica and Xtensa are registered trademarks belonging to Tensilica Inc.

-- BDTI Benchmarks and BDTIsimMark2000 are trademarks of Berkeley Design Technology, Inc.

-- Tensilica's announced licensees include Agilent, AMCC (JNI Corporation), Astute Networks, Avision, Bay Microsystems, Berkeley Wireless Research Center, Broadcom, Cisco Systems, Conexant Systems, Cypress, Crimson Microsystems, ETRI, FUJIFILM Microdevices, Fujitsu Ltd., Hudson Soft, Hughes Network Systems, Ikanos Communications, LG Electronics, Marvell, MediaWorks, NEC Laboratories America, NEC Corporation, Nippon Telephone and Telegraph (NTT), Olympus Optical Co. Ltd., S2io, Solid State Systems, Sony, STMicroelectronics, TranSwitch Corporation, and Victor Company of Japan (JVC).



Contact:
Tensilica
Paula Jones, 408-327-7343

Email Contact
 or
Joany Draeger, 650-365-3395

Email Contact


« Previous Page 1 | 2             



Review Article Be the first to review this article
Aldec Webinar Nov 30

Featured Video
Editorial
Peggy AycinenaWhat Would Joe Do?
by Peggy Aycinena
Computer History Museum: the Future of War is Here
More Editorial  
Jobs
ASIC Design Engineer for Infinera Corp at Sunnyvale, CA
Principal PIC Hardware Controls Engineer for Infinera Corp at Sunnyvale, CA
Senior SW Developer for EDA Careers at San Jose, CA
Senior PIC Test Development Engineer for Infinera Corp at Sunnyvale, CA
REVISED***Director Product Line RF/IC for EDA Careers at San Jose, CA
Upcoming Events
“Empowering Leadership with WIT and WISDOM” at SEMI 673 South Milpitas Blvd. Milpitas CA - Nov 28, 2017
Artificial Intelligence and Convolution Neural Networks Discussion at San Jose State University Student Union Theater San Jose CA - Dec 4, 2017
Silicon Valley's Only Comprehensive Embedded Systems Conference at San Jose Convention Center 150 W. San Carlos St. San Jose CA - Dec 5 - 7, 2017
Oski Technology’s Decoding Formal Club Meeting at The Conference Center San Jose CA - Dec 7, 2017



Internet Business Systems © 2017 Internet Business Systems, Inc.
25 North 14th Steet, Suite 710, San Jose, CA 95112
+1 (408) 882-6554 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise