Aldec Delivers Global Project Management for Complex FPGA Designs with the Latest Release of Active-HDL™

HENDERSON, Nev. — (BUSINESS WIRE) — October 23, 2013Aldec, Inc., today announced the immediate availability of Active-HDL™ version 9.3, introducing a revolutionary approach to the increasing challenges of global project management. “Today’s complex FPGA devices are designed with multiple teams and require more efficient team-based project management tools,” said Satyam Jani, Aldec Software Division Product Manager. “This release of Active-HDL has made substantial strides in managing tool settings for multi-design FPGA projects and team-based environments.”

New Project Management Features

  • Active-HDL’s user-defined directory structure allows engineers to create project structures compatible with standard Synthesis and Place & Route tools, allowing one common project structure to be used between multiple vendor tools.
  • Multi-design projects involve many settings, for example: setting a working directory, updating local variables, setting a script mode, executing specific macros, etc. Active-HDL 9.3 introduces a load-time setup file approach that automatically loads these settings.
  • After initial set-up, the simulator can be set at different running modes with a single click. This feature allows users to run Active-HDL in the right mode for each task; Optimized mode will run the simulator at the highest possible speed while Debug and Coverage mode will run at reduced speed while collecting data for later analysis.

About Active-HDL™

Award-winning Active-HDL, an FPGA designer tool-of-choice for over 15 years, is an HDL-based FPGA Design and Simulation solution that offers design creation, documentation, code coverage and simulation in one tightly integrated environment.

  • Team-based design management to manage complex FPGA projects easily
  • High-performance mixed language support with VHDL 2008, Verilog and SystemVerilog(Design) support
  • Pre-compiled libraries for latest FPGA devices from Altera®, Lattice®, Microsemi™ (Actel) and Xilinx®
  • Floating point support in Waveform Viewer


New customers and customers without current maintenance contracts are invited to contact their local Aldec Distributor to receive additional information on the latest release.

For additional information about Active-HDL 9.3 including tutorials, free evaluation downloads and What’s New Presentation, please visit

About Aldec

Aldec Inc., headquartered in Henderson, Nevada, is an industry leader in Electronic Design Verification and offers a patented technology suite including: RTL Design, RTL Simulators, Hardware-Assisted Verification, SoC and ASIC Prototyping, Design Rule Checking, IP Cores, Requirements Lifecycle Management, DO-254 Functional Verification and Military/Aerospace solutions.

Aldec is a registered trademark of Aldec, Inc. All other trademarks or registered trademarks are the property of their respective owners.


Aldec, Inc.
Christina Toole, + (702) 990-4400
Email Contact

Review Article Be the first to review this article


Featured Video
Peggy AycinenaWhat Would Joe Do?
by Peggy Aycinena
Acquiring Mentor: Four Good Ideas, One Great
More Editorial  
SENIOR ASIC Design Engineer for TiBit Communications at Petaluma, CA
Manager, Field Applications Engineering for Real Intent at Sunnyvale, CA
Sr. staff ASIC Design Engineer -2433 for Microchip at San Jose, CA
Upcoming Events
DeviceWerx - 2016 at Green Valley Ranch Casino & Resort Las Vegas NV - Nov 3 - 4, 2016
2016 International Conference On Computer Aided Design at Doubletree Hotel Austin TX - Nov 7 - 10, 2016
ICCAD 2016, Nov 7-10, 2016 at Doubletree Hotel in Austin, TX at Doubletree Hotel Austin TX - Nov 7 - 10, 2016
Electric&Hybrid Aerospace Technology Symposium 2016 at Conference Centre East. Koelnmesse (East Entrance) Messeplatz 1 Cologne Germany - Nov 9 - 10, 2016
S2C: FPGA Base prototyping- Download white paper

Internet Business Systems © 2016 Internet Business Systems, Inc.
595 Millich Dr., Suite 216, Campbell, CA 95008
+1 (408)-337-6870 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy Policy