Forte Rolls Out Latest Version of High-Level Synthesis Software

SAN JOSE, CA -- (Marketwire) -- Oct 29, 2012 -- Forte Design Systems™, a leading provider of software products that enable design at a higher level of abstraction and improve design results, today announced immediate availability of the latest version of its Cynthesizer™ SystemC high-level synthesis (HLS).

Enhancements, including increases to Cynthesizer's performance and capacity, have been made across the entire tool suite to enable designs to be done faster and with better results. The latest features include new modeling style support, expanded optimization and analysis capabilities, integration with third-party tools and improvements to CynWare™ intellectual property (IP) cores.

"We continue to focus on delivering high-value synthesis software driven by customer needs," states Brett Cline, Forte's vice president of marketing and sales. "Cynthesizer 4.3 provides significant improvements in power results and ease of use while expanding our leading CynWare IP library, allowing design teams to quickly adopt high-level synthesis and get great results."

New Features, Capabilities

Cynthesizer 4.3 has a number of new features to make it easier to model designs and quickly synthesize to the register transfer level (RTL) with great results. For instance, Cynthesizer now supports the synthesis of the standard C++ math library " < complex > " in addition to the CynWare fixed point data types. This modeling technique maintains precision throughout complex computations in the high-level SystemC design and creates optimized RTL code through the HLS process. Cynthesizer 4.3 adds support for asynchronous zero-latency memories in addition to the extensive memory capabilities built into the product.

The use of C++ templates and virtual functions has been expanded for defining module structure and behavior to allow users to express design intent at a higher level, reducing the amount of code required and increasing reusability. Cynthesizer supports the use of the standard math libraries with C/C++ and SystemC datatypes.

Improvements have been made to the Cynthesizer Workbench™ (CynthWB) environment, including formatting and filtering of tabular reports and the ability to link objects to the call stack to improve debugging and optimizing of the design. Support has been added for asynchronous external memories, along with variable accesses to arrays of external memories, register banks and memories to support more design styles and provide better results. Large projects will load quickly in CynthWB and navigation through analysis data is faster. The layout for analyzing synthesis results has been improved, and an analysis capability that compares quality of results (QoR) of two selected cynthConfigs is included.

Forte's CynWare IP library and CynWare Interface Generator™ have been updated to improve quality of results and usability. In a power saving move, the CynWare Line Buffer IP interface now allows memory reads to be avoided for unneeded rows or columns. To improve performance and prevent avoidable pipeline stalls, CynWare FIFOs implemented with single-ported memories have an extra buffer register to decouple the synthesized design from the FIFOs internal read-write cadence.

In keeping with a commitment to delivering a seamless integration with downstream design tools, Forte integrated Cynthesizer with the Cadence® Incisive® Enterprise Simulator and the SimVision debugging environment, and Oasys Design Systems' RealTime Designer™ to link high-level synthesis to chip synthesis.

Finally, Cynthesizer now supports mapping arrays in a design to either a flattened set of registers or a memory, and maps arrays to a register bank for improved capacity and runtime. Designs with large register banks can be mapped directly to a register bank instead of flattening the array.


The latest version Cynthesizer is shipping now.

For more information, go to:

About Forte Design Systems

Forte Design Systems is a leading provider of software products that enable design at a higher level of abstraction and improve design results. Its innovative synthesis technologies and intellectual property offerings allow design teams creating complex electronic chips and systems to reduce their overall design and verification time. More than half of the top 20 worldwide semiconductor companies use Forte's products in production today for ASIC, SoC and FPGA design. Forte is headquartered in San Jose, Calif., with additional offices in England, Japan, Korea and the United States. For more information, visit

Forte Design Systems and Cynthesizer are registered trademarks for Forte Design Systems. Forte acknowledges trademarks or registered trademarks of other organizations for their respective products and services.

For more information, contact:
Brett Cline 
Forte Design Systems 
(978) 206-1855

Email Contact 

Nanette Collins
Public Relations for Forte Design Systems
(617) 437-1822

Email Contact 

Review Article Be the first to review this article

ClioSoft at DAC

Featured Video
Senior Electrical Engineer for Allen & Shariff Corporation at Pittsburgh, Pennsylvania
Upcoming Events
DAC 2018 at Moscone Center West San Francisco CA - Jun 24 - 28, 2018
Symposium on Counterfeit Parts and Materials 2018 at College Park Marriott Hotel & Conference Center MD - Jun 26 - 28, 2018
Concar Expo 2018 at Convention Hall II Sonnenallee 225 Berlin Germany - Jun 27 - 28, 2018
Nanotech 2019 at Tokyo Big Sight East Halls 4-6 & Conference Tower Tokyo Japan - Jun 30 - 1, 2018
DownStream: Solutions for Post Processing PCB Designs
TrueCircuits: IoTPLL

Internet Business Systems © 2018 Internet Business Systems, Inc.
25 North 14th Steet, Suite 710, San Jose, CA 95112
+1 (408) 882-6554 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise