Tanner EDA to Preview HiPer Simulation A/MS and Participate in Panel on Analog Productivity at DATE 2012

MONROVIA, California – March 6, 2012 – Tanner EDA, the catalyst for innovation for the design, layout and verification of analog and mixed-signal integrated circuits (ICs), will preview HiPer Simulation A/MS and participate in a panel on analog productivity at the Design, Automation and Test in Europe conference ( DATE 2012).  HiPer Simulation A/MS is a mixed-signal electronic design automation (EDA) tool suite that integrates Tanner EDA’s analog design, layout and physical verification tools with third-party logic synthesis and mixed-language VHDL and Verilog simulation. DATE 2012 takes place from 12-16 March in Dresden, Germany.

PANEL:

What: Panel entitled “Analog Productivity – Design and Test of Analog/Mixed Signal ASICs” chaired by Prof. Georges Gielen, Head of Department of Electrical Engineering (ESAT),  Katholieke Universiteit Leuven, Belgium.

Abstract: With analog an ever-important aspect of emerging microelectronic applications, never has the need to improve productivity been more acute. Drawing from a range of industry experts, this panel will highlight and discuss the main areas affecting this field, namely analog/digital co-design, IP reuse, layout automation and design for test/yield.

Who:

  • Jeff Miller, Director of Product Management, Tanner EDA, USA / System-level simulation   
  • Ciaran Whyte, CTO, IC Mask Design Limited, Ireland / Layout acceleration
  • Dr. Holger Haberla, Non-Volatile Memory Design Manager, X-FAB Semiconductor Foundries AG, Germany / IP reuse            
  • Marc Hutner, DFT Architecture Engineering, Teradyne, USA/ Design for test, yield

When: Tuesday, 13 March from 13:15 – 14:15

Where: Exhibition Theatre

DEMONSTRATIONS:

What: Preview of HiPer Simulation A/MS, an integrated solution that gives designers a complete analog design flow from schematic capture, circuit simulation, and waveform probing to physical layout and verification, logic synthesis and mixed VHDL and Verilog simulation. HiPer Simulation A/MS will combine industry-leading technologies into a highly productive design flow for mixed-signal design with industry-leading price-performance.

When:  Tuesday, March 13th through Thursday, March 15th, 2012

Where: Tanner EDA Booth #37

About Tanner EDA

Tanner EDA provides a complete line of software solutions that catalyze innovation for the design, layout and verification of analog and mixed-signal (A/MS) integrated circuits (ICs) and MEMS. Customers are creating breakthrough applications in areas such as power management, displays and imaging, automotive, consumer electronics, life sciences, and RF devices. A low learning curve, high interoperability, and a powerful user interface improve design team productivity and enable a low total cost of ownership (TCO). Capability and performance are matched by low support requirements and high support capability as well as an ecosystem of partners that bring advanced capabilities to A/MS designs.

Founded in 1988, Tanner EDA solutions deliver just the right mixture of features, functionality and usability. The company has shipped over 33,000 licenses of its software to more than 5,000 customers in 67 countries.

 

HiPer Verify and HiPer Silicon are trademarks of Tanner Research, Inc.

All other trademarks and trade names are the property of their respective owners.

 

#          #          #

 

Media Contact :

Linda Marchant, Cayenne Communication, 919-451-0776, Email Contact

 




Review Article Be the first to review this article
Featured Video
Editorial
More Editorial  
Jobs
Engr, Elec Des 2 for KLA-Tencor at Milpitas, CA
ASIC Design Engineer for Ambarella at Santa Clara, CA
Staff Software Engineer - (170059) for brocade at San Jose, CA
Test Development Engineer(Job Number: 17001697) for Global Foundaries at Santa Clara, CA
Verification Engineer for Ambarella at Santa Clara, CA
ASIC Design Engineer 2 for Ambarella at Santa Clara, CA
Upcoming Events
CDNLive Silicon Valley 2017 at Santa Clara Convention Center Santa Clara CA - Apr 11 - 12, 2017
10th Anniversary of Cyber-Physical Systems Week at Pittsburgh, PA, USA PA - Apr 18 - 21, 2017
DVCon 2017 China, April 19, 2017, Parkyard Hotel Shanghai, China at Parkyard Hotel Shanghai Shanghai China - Apr 19, 2017
Zuken Innovation World 2017 at Hilton Head Marriott Resort & Spa Hilton Head Island NC - Apr 24 - 26, 2017
S2C: FPGA Base prototyping- Download white paper



Internet Business Systems © 2017 Internet Business Systems, Inc.
595 Millich Dr., Suite 216, Campbell, CA 95008
+1 (408)-337-6870 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy Policy