New Magillem Sequence Editor Simplifies Creation and Verification of Register Sequences

Sequences are plugged directly into the registers database from a datasheet to create ready-to-compile source code

Paris, France , Sept. 27, 2011 -- Magillem, the leader of IP-XACT™ based solutions for SoCs design, launches an unprecedented software to solve yet another communication loop issue between the system architect ( the spec owner) , the designers and the verification engineers.

Until today, to activate a functionality of a device (for example, to activate the sepia mode of a camera), a verification engineer or a firmware engineer must define a sequence to access registers of one or several IPs. This definition is written in text language and may be ambiguous.

The Magillem Sequence Editor (MSE) is the first tool capable to define registers sequences linked to resources of the design and production flow. Sequences are written in an augmented C language, the tool can generate various output formats (C, E language Specman™, documentation). Furthermore, the sequences are written once and for all: when definitions of registers change during the IP or the system lifecycle, it is possible to visualize sequences that need to be subsequently updated.

MSE is part of the Magillem Eclipse based Integrated Design Environment and allows for easy sequence writing with LINT features and a complete visualization of the IP structure while designing sequence code.

Thanks to MSE, a user can get the accurate definition of his design’s bit fields and registers. MSE also provides for sequences comparison and highlights differences between two sequences. In a set of sequences, MSE will retrieve the “canonic form “ of the sequence, helping the user to identify the root functionality even after a series of derivatives or changes.

MSE has been developed thanks to the benefit brought by IP-XACT, now known as IEEE 1685:  IP--XACT/IEEE 1685 has standardized the way to describe registers, so that blocks coming from third parties can be integrated without an extra effort to describe them.

Magillem already offers MRV for Register Management, capturing and handling registers in IP-XACT. “The combination of MRV and MSE is the missing link between IP’s hardware resources and software functionalities.” says Cyril Spasevski, CTO and co-founder of Magillem SA, “Until now, register management was done from a database with a mix of excel based sheets and proprietary formats. It was impossible for verification or software engineers to define sequences based on heterogeneous formats in a unique machine readable language and even less to maintain an up to date database of sequences when registers would change throughout the life of the designs or the IPs !

This kind of tool  needs a  very low learning curve, as the sequence syntax is essentially the C language syntax with a few exclusive additions and greatly improves developer productivity and efficiency .”

The direct connection with the IP-XACT descriptions provided by MSE enables developers to dynamically check available register data, while entering sequence code, using auto-completion, smart hover and content assist. Dynamic checkers operate constantly to ensure the consistency of sequence code by aligning data-access and size restrictions with the register data.

Automatic code generation runs continually to translate sequence code into compilable code, using configurable generators for packaging the IP. MSE provides native ANSI-C and Specman™ generators, which can be extended to support custom access to register data, and complemented with other generators.

Used in conjunction with MRV, MSE covers the complete IP design and packaging workflow and represents Magillem first foray into embedded software.


About Magillem

Magillem, a board member of ACCELLERA™, has developed an easy to use, IP-XACT based state-of-the-art platform solution to cover electronic systems design flow challenges in a context where complexity, interoperability and design re-use are becoming critical issues to manage design cycle time of SOC. Company is Headquartered in Paris, France, with offices in New York, USA and Tokyo, Japan. Customers include the first tier SoC manufacturers worldwide.

Magillem is a public company traded on the Euronext Free Market.

About IP-XACT / IEEE 1685™

IEEE 1685™, "Standard for IP-XACT, Standard Structure for Packaging, Integrating and Re-Using IP Within Tool-Flows," describes an XML Schema for meta-data documenting Intellectual Property (IP) used in the development, implementation and verification of electronic systems and an Application Programming Interface (API) to provide tool access to the meta-data.

IP-XACT was created by the SPIRIT Consortium, now part of Accellera, as a standard to enable automated configuration and integration through tools. 150 industrial companies and organizations are members. The goals of the standard are: to ensure delivery of compatible component descriptions from multiple component vendors, to enable exchanging complex component libraries between electronic design automation (EDA) tools for SoC design (design environments), to describe configurable components using metadata, and to enable the provision of EDA vendor neutral scripts for component creation and configuration.


For further information please visit


Magillem LLC

161 West 54th street suite #202A
New  York, NY 10019 USA
Tel: +1 212-378-4409
Fax: +1 212-292-3999

Magillem SA

4 rue de la Pierre Levée
75011 Paris, France
Tel : +33. (0)
Fax : +33. (0)


Magillem Asia  Shinagawa Intercity Tower A,

 Level 28, Shinagawa Intercity A
2-15-1 Kounan Minato-ku
Tokyo, Japan 108-6028      Tel : +81 3 6717 4589    Tel : +81 90 4748 1652

Review Article Be the first to review this article
Downstream : Solutuions for Post processing PCB Designs

Featured Video
Currently No Featured Jobs
Upcoming Events
RISC-V Workshop Chennai at IIT Madras Chinnai India - Jul 18 - 19, 2018
CDNLive Japan 2018 at The Yokohama Bay Hotel Tokyu Yokohama Japan - Jul 20, 2018
International Test Conference India 2018 at Bangalore India - Jul 22 - 24, 2018
MAPPS 2018 Summer Conference at The Belmond Charleston Place Charleston SC - Jul 22 - 25, 2018
Verific: SystemVerilog & VHDL Parsers
TrueCircuits: IoTPLL

Internet Business Systems © 2018 Internet Business Systems, Inc.
25 North 14th Steet, Suite 710, San Jose, CA 95112
+1 (408) 882-6554 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise