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What's New on EDACafe

AWR Wins at the First Annual Best of Microwaves & RF 2013 Reader Survey Awards

DAC TSMC Presentation by Bernd Stamme of Kilopass

"Raiders of the Lost Article" by Tom Anderson

"Demystifying Traceability" by Louie De Luna

"AWR: Redefining Design" by Sherry Hess

"The Internet of Things" by Ed Lee

Origins of Silicon Valley’ Is Keynote Topic of International Wafer-Level Packaging Conference (IWL…

FabStream™ and PragoBoard form Partnership

Atrenta Announces Design Service Alliance Network in Israel

eMemory Technology Selects Berkeley Design Automation Analog FastSPICE™ Platform for Embedded Non-Volatile…

Interview with Rod Simon of Open text

ANSYS and US Army Partner To Increase Efficiency of Simulating Government Defense Technology

"Raiders of the Lost Article" by Tom Anderson

Interview with Sam Appleton, CEO of Ausdia.

How Export Control Reform will Impact Business

Synopsys’ Next Generation FPGA-Based Prototyping System Delivers 3x Speed Performance and Accelerates…

"Prakash Narain: creating a unique workplace culture at Real Intent" by Peggy Aycinena

Interview with Sam Appleton, CEO of Ausdia

Altium Releases Enhancement Focused Update to Altium Designer and the AltiumLive Ecosystem

"AWR: Redefining Design" by Sherry Hess

"The Internet of Things" by Ed Lee

"Demystifying Traceability" by Louie De Luna

IDC Market Study Shows Strong Gains for Co-Processors and Big Data at High Performance Computing Sit…

Interview with Andrew Haines, V.P. at Arasan Chip Systems

Synopsys Delivers 2X Speedup for Implementing and Verifying Functional ECOs

Intellitech Supports Silicon Instruments Through The New IEEE 1149.1-2013 JTAG Standard

Stand up Comedians at DAC 2013 in Austin

Interview with Andrew Haines, Vice President at Arasan Chip Systems

Interview with John Heinlein, V.P. of Marketing at ARM

"Freescale’s Nunez: Get it in writing before integrating External IP" by Peggy Aycinena

"Where, Oh Where Should My Little DAC Be?" by Tom Anderson

"Lending a ‘Formal’ Hand to CDC Verification: A Case Study of Non-Intuitive Failure Signatures …

"TSMC Ecosystem Moving Online" by Tom Quan

" Back from DAC" by Dmitry Melnik

ReConFig 2013

"TSMC Ecosystem Moving Online" by Tom Quan

IDC Lowers Forecast Growth for PC Monitors While Average Screen Size Increases

Kilopass Appoints Charlie Schadewitz Vice President of Sales To Continue Its Growth

Breker Verification Systems' CEO Adnan Hamid Named Top Embedded Innovator by Embedded Computing Design…

Embedded Computing Design Names Uniquify's Josh Lee Top Innovator

Arasan Chip Systemsintroduces USB 3.0 SSIC BridgeIP

UP Media Group Announces PCB West 2013 Technical Conference

AWR Helps Auriga Accurately Simulate Nonlinear Performance of Complex MMICs and Modules for Radar and…

Slow Growth Ahead for Economy and Electronics Industry, According to IPC

AWR Design Forum (ADF) 2013 Agendas Announced and Registration Opens for Korea and Japan

HPC Server Market Grows 5.3% in First Quarter of 2013, IDC Reports

50th Design Automation Conference in Austin Exceeds Expectations

"DAC 2013: Cowboys, Revolutionaries, The Art of War" by Peggy Aycinena

"Looking Back on DAC 2013" by Tom Anderson

"Photo Booth Blackmail!" by Graham Bell

Synopsys Unveils New Synthesis-Based Test Technology Delivering Up to 3X Higher Compression

"DAC 2013: Cowboys, Revolutionaries, The Art of War" by Peggy Aycinena

Smart Connected Devices in Emerging Markets to Surpass 1 Billion Unit Shipments by 2014 with More Than…

IPC Releases Study on Quality Benchmarks for EMS Industry

"Looking Back on DAC 2013" by Tom Anderson

"DAC 2013: Top 10 on Day 3 in Austin" by Peggy Aycinena

"Check-In after Two Days at DAC 2013" by Tom Anderson

Arasan Webcast: Design Considerations for UFS and eMMC Controllers Compliance and Compatibility

U.S. Manufacturers Urge Action Against India’s Illegal Trade Practices

CYBERPOWERPC Launches Affordable Stealth Series Desktop Computers Featuring NVIDIA® GeForce® GTX Graphics,…

Atrenta Ships 5.1 Release of SpyGlass® Platform

"DAC 2013: Top 10 from Day 2 in Austin" by Peggy Aycinena

Kilopass Appoints Charlie Schadewitz Vice President of Sales to Continue Its Growth

REMINDER: MEDIA ALERT: Kilopass to Exhibit at TSMC 2013 China Technology Symposium

REMINDER: MEDIA ALERT: Secrets of Design for Yield to Be Explored During 50th Design Automation Conference…

Lenovo Announces Official Opening of U.S. Computer Manufacturing Line in North Carolina

HP Transforms Large-Format Printing Process With New Ergonomically Designed ePrinters

"Check-In after Two Days at DAC 2013" by Tom Anderson

Khalifa University Signs Agreement with Circuits Multi Projets (CMP)

Advancing Electronics Beyond CMOS and System Level Design at DATE 2014 in Dresden

Fab Equipment Spending: Strong Second Half Pulls 2013 Up; over 23% Growth for 2014

Northwest Logic’s PCI Express 3.0 Solution passes PCI-SIG PCIe 3.0 Compliance Testing at First Official PCIe 3.0 Compliance Workshop

ASSET ScanWorks is among the first tools to support the new on-chip Intel Silicon View Technology

"DAC 2013: Top 10 from Day 1 in Austin" by Peggy Aycinena

ANSYS-Apache Receive TSMC 16nm FinFET Certification for Power Integrity And ElectroMigration Verific…

CST Interview Series Spotlight on University Research

"DAC 2013: IP news in advance of Austin" by Peggy Aycinena

"Warren Savage interviews Mike Gianfagna on the importance of collaboration" by Ed Lee

"OneSpin Reaches for the Cloud" by Nanette Collins

"Does SoC Sign-off Mean More Than RTL?" by Graham Bell

"‘Wireless Algorithm Validation’ with Aldec and Agilent" by Dmitry Melnik

"An Insider’s Appraisal of the Japanese Semiconductor Market" by Jonah McLeod

"New Company/Candidate Recruiting Software Changes Everything…Seems Like More Parties @ DAC @ Everybody’s…

"A Matched Pair of Panels at DAC in Austin" by Tom Anderson

Vayavya Labs Introduces First Automated Software-Driven Verification Tool

Huada Empyrean, China's Largest EDA Provider, to Distribute Silvaco Products

Mentor Graphics to Provide Tessent Silicon Test, Yield Analysis, Calibre Physical Verification and DFM…

Agilent Technologies Announces Industry-First Capabilities for Envelope Tracking for LTE Power-Amplifier…

"DAC 2013: EDA news in anticipation of Austin" by Peggy Aycinena

True Circuits Introduces a Revolutionary New DDR 4/3 PHY at the Design Automation Conference in Austin,…

Modelithics COMPLETE Library v10.1 of Simulation Models Now Available for AWR’s Microwave Office

Nimbic CEO Dr. Raul Camposano to Keynote Session at AWS Cloud for Semiconductor and Electronic Design…

Jasper and Duolog Partner to Combine SoC Integration With Formal Verification

New BOXX Workstation Boosts Performance With 4th Generation Intel Processors

Mentor Graphics Questa and Veloce Verification Platforms Add Cache Coherency and Interconnect Performance…

OneSpin Solutions Invites DAC Attendees to Beta Test New Cloud Computing System

Synopsys Delivers Comprehensive Design Implementation Solution for Samsung's Leading-Edge 14-Nanometer…

Low-Power BA21 Processor Core Brings 32-bit Benefits to Embedded Microcontroller Applications

TRADE NEWS: Agilent Technologies Unveils System Design Tools for Satellite Communications and Naviga…

Blue Pearl Software Suite Customized for Xilinx Users

Ausdia Introduces Timing Constraints Generation and Validation Add-on to Timevision at DAC 2013

Blue Pearl Software Suite is Now Available for Purchase Through the Embedded Software Store

MediaTek Selects CLK Design Automation’s Variance FX for AOCV

EdXact provides new integration of Jivaro with Agilent Technologies’ GoldenGate simulator

Magillem will be present at DAC 2013, Austin, TX June 3-5, 2013 – Booth # 1715

"DAC 2013: IP news in advance of Austin" by Peggy Aycinena

"pre-DAC 2013: TSMC certifies AtopTech, CDNS, MENT, SNPS" by Peggy Aycinena

Forte Design Systems, CircuitSutra Partner on Design Services, IP Co-Development

New Company/Candidate Recruiting Software Changes Everything…Seems Like More Parties @ DAC @ Everybody’s…

Si2 Announces Acquisition of the Compact Model Council

Si2 and TechAmerica Announce Transfer of the Compact Model Council to Si2

HDL Design House and Airics Seminar on Latest Verification Trends in FPGA and ASIC

Mentor Graphics Andras Poppe Recognized by JEDEC Standards Organization for Contributing to the Development…

EnSilica launches the eSi-ZM1 System-on-Module for faster, lower risk and smarter embedded systems d…

ATopTech Introduces New Technologies for Aprisa and Apogee Physical Design Solutions at DAC 2013

SiTune Corporation signs strategic license agreement with major semiconductor company serving STB and TV markets

"Wireless Algorithm Validation’ with Aldec and Agilent" by dmitrymelnik

"An Insider’s Appraisal of the Japanese Semiconductor Market" by Tatsuya Yamazaki, VP of Business …

Calypto Expands Participation at DAC 2013 in Austin, TX

TSMC Selects Berkeley Design Automation Analog FastSPICE™ Mega for 16-nm FinFET-Based Memory Verif…

MEDIA ALERT: Kilopass to Exhibit at TSMC 2013 China Technology Symposium

Atrenta and Mentor Collaborate on SoC Power Signoff

Jasper Design Automation Selected as a Red Herring Top 100 North America Company

IEEE 1801™-2013 Designed to Improve Energy Efficiency of Electronic Devices

SMIC's 2013 Advanced Technology Workshop Held in Shanghai Focusing on 40nm and 28nm Technology O…

Accellera Systems Initiative Names Stan Krolikoski Recipient of 2013 Leadership Award

Worldwide Server Market Revenues Decrease 7.7% in First Quarter as Market Demand Slows, According to…

DAC 2013 Honors the Electronic Design Industry’s Global Reach by Organizing a Global Forum for Nations…

The Multicore Challenge - 13th June 2013

Test Vision 2020 to Address Emerging Test Strategies, Technologies, and Application Challenges

Infiniscale to exhibit ICLys™, the new Monte Carlo analysis standard, at 50th DAC

PMC Adopts Cadence Physical Verification System as Signoff Technology for Large Complex SoC

Mentor Graphics and GLOBALFOUNDRIES Deliver 20nm Design Kits for Advanced Design Enablement

CaetanoBus Streamlines its Electrical Design Processes Using Capital Software from Mentor Graphics

Sondrel to Take Part in Three TSMC Technical Engineering Conferences in China and Europe

Si2 Announces New Power Distribution Network Standard for 3D Integrated Circuits

MEDIA ALERT: Uniquify to Celebrate Design Automation Conference's 50 Years of Innovation

CORMORAN Project Exploring Ways to Improve Cooperation In and Between Wireless Body Area Networks

Berkeley Design Automation Announces Analog FastSPICE™ Mega

Media Alert: Kilopass to Exhibit at GSA European Executive Forum in Munich

Jasper Design Automation Presenting Customer Verification Innovation Seminars DAC 2013

Enhancements To ANSYS® HFSS™ Promote Streamlined Electromagnetic Simulation

IEEE 1801™-2013 Designed to Improve Energy Efficiency of Electronic Devices

IEEE Standards Association Symposium on EDA Interoperability Launched to Encourage Industry Adoption…

New IPC North American EMS Market Report Indicates Continued Growth

HSA Foundation Announces First Specification

Toshiba Unveils Portege Z10t Detachable Ultrabook

CAD Pioneers Lead Latest PCB Design Hall Inductees

Next Generation PCB Library Expert Released

Cadence Design Tools Certified for TSMC 16nm FinFET Process and for TSMC 20nm Process

OneSpin Solutions Names Jim Cantele Vice President of Worldwide Sales

Mentor Graphics Brings Seamless Software Trace, Debug, and Performance Analysis to Embedded Systems …

MEDIA ALERT: Breker Verification Systems to Celebrate 10th Anniversary at Design Automation Conference…

MEDIA ALERT: Carbon Design Systems to Exhibit in the ARM Booth at the 50th Design Automation Confere…

Agilent Technologies Introduces Electrical Retimer Solution to Solve Key Challenges in Designing Chip-to-Chip…

Si2 Co-Sponsors Low Power Standardization Futures Meeting at DAC

Undo Software Expands Operations with Additional Cambridge Angels Funding, New Board Member Robert S…

Mouser, Kanaan Celebrate 2013 Indy 500 Victory

Kilopass and UMC Align for Advanced 28nm IP

Atrenta Announces a New Text Book on Timing Constraints

PC Outlook Falls as Market Increasingly Looks to Tablets, According to IDC

IDC Forecasts Worldwide Tablet Shipments to Surpass Portable PC Shipments in 2013, Total PC Shipments…

"KNTV talks to EDA firm re startups in Silicon Valley" by Ed Lee

S2C Debuts Low-Cost Rapid SoC Prototyping Hardware – K7 TAI Logic Modules

EDA Veteran Launches G-Analog to Provide Next-Generation Characterization Software

Mentor Graphics and TSMC Collaborate to Improve and Expand 20nm IC Physical Verification Offering

Mentor Graphics Design and Verification Tools Certified for TSMC 16nm FinFET

Agilent Technologies’ Newest 3-D Electromagnetic Simulation Software Release Targets EMI Complianc…

Flexera Software Sees Robust Demand Growth in China for Application Usage Management Solutions

Concept Engineering Adds SPEF Parasitic Netlist Interface to SpiceVision® PRO and StarVision® PRO

MEDIA ALERT: OneSpin Solutions to Demonstrate New Cloud Offering at 50th Design Automation Conferenc…

NanGate Launches DAC #50 Campaign: 50 Library Characterizer™ Licenses for USD 50K

TowerJazz Participates at DAC with Major EDA Vendors to Showcase Latest Tools Combined with its Superior…

PRO DESIGN Unveils Affordable Virtex 7 Based FPGA Module for Multi FPGA Prototyping at DAC 2013

"Paul Estrada: BDA with an ACE up its sleeve" by Peggy Aycinena

Media Alert: Kilopass to Present Non-Volatile Memory IP Roadmap for TSMC Process Technologies During…

"ProximusDA & STMicro: distributed SOC TLM VPs" by Peggy Aycinena

"Ascent Lint Rule of the Month: DEFPARAM" by Shiva Borzin

"Patience and Fortitude Pay Off for Forte" by Nanette Collins

Mentor Graphics Reports Fiscal First Quarter Results and Announces Dividend

SFT Introduces Critical Semiconductor Design Products for ESD & Electro-Thermal Analysis

Docea Power to present unique solutions for modelling and simulation of dynamic thermal management strategies…

Heart of Technology Hosts Benefit for CASA on June 3 at Austin City Limits Live

Lenovo Reports Strong Fourth Quarter and Full Year 2012/13 Results

MEDIA ALERT: ProPlus Design Solutions to Offer Journey "From Nano-Scale Modeling to Giga-Scale Simul…

Cadence Completes Acquisition of Cosmic Circuits

Synopsys Delivers VDK for Renesas RH850 MCUs

ClioSoft at DAC 2013: SOS is the Only DM Platform Integrated with All Major Analog and Custom IC Design…

MEDIA ALERT: Forte Design Systems Heads to 50th Design Automation Conference With Cynthesizer 5, Next-Generation…

Avery Design Systems Enhances RTL and Gate-Level X-Verification with SimXACT 2.0 and XOPT 2.0

Si2 Announces DAC Booth Presentations

HP Unveils Desktop PC That Leaves the Desk Behind

Real Intent to Exhibit Fun and Verification Solutions, Demonstrate New RTL Flows, and Present at DAC…

ProximusDA teams with STMicroelectronics to develop next-generation distributed SOC TLM virtual prot…

MEDIA ALERT: Cadence Issues Call for Papers for MemCon 2013

MEDIA ALERT: Cadence Celebrates 25 Years as a Leader in the EDA Industry at 50th DAC

Synopsys Plans Full Slate of Special Events at DAC 2013

Atrenta Presents RTL Signoff at 50th DAC

Attend MTF MunEDA Technical Forum Austin 2013, Jun 07

InfiniScale’s ICLys™ solution, for Variability-aware design, adopted by STMicroelectronics

Verific Invites Design Automation Conference Attendees to “Build Your Own RTL Tools” AT DAC BOOTH…

Synopsys Posts Financial Results for Second Quarter Fiscal Year 2013

HP Reports Second Quarter 2013 Results

SiSense Introduces Prism 10X, the Only Data Analytics Solution Based on "In-Chip" Technology

ATopTech’s Aprisa and Apogee Physical Implementation Tools Certified by TSMC for 16nm FinFET Techn…

"Industry’s first Requirements Lifecycle Management for Safety-critical FPGAs and ASICs" by Louie …

"IP exerting its presence at DAC" by Ed Lee

"System Verilog Queues which can shrink and grow !" by Ankit Gopani

"Blog Post, Shall I Compare Thee to a Magazine’s Lifespan?" by Tom Anderson

Si2 Announces Board of Directors for 2013-2014

Verific Invites Design Automation Conference Attendees to “Build Your Own RTL Tools”

MEDIA ALERT: Call for Papers for CDNLive Boston 2013 User Conference Now Open

Jedat Releases Innovative OA-based Circuit and Layout Tools for Analog Mixed-Signal Designs at DAC 2…

TSMC Certifies Cadence Tempus Timing Signoff Solution for 20nm Designs

Mentor Graphics Teams with OpSIS Foundries and Lumerical Solutions on PDK Development for IME Silicon…

Rocketick Adds James Hogan, a Semiconductor Industry Veteran and EDA visionary and luminary to Advisory…

Mouser Electronics’ President and CEO Glenn Smith Celebrates 40 Years of Service

STARC selects Asygn’s Tactyle as the AMS System Level Design & Verification solution for STARCAD-AMS design flow

Video: Real Intent Achieves More Than 70-Percent Revenue Growth in First Half of 2013

Nimbic Founder Dr. Vikram Jandhyala to Keynote Session on “Cloud-Based Scalable Electromagnetic Solvers…

AWR Announces Agenda of Activities for IMS 2013

Tanner EDA at DAC 2013: 25 Years of Driving Innovation for Analog and Mixed-Signal Designers

CST Workshop Series 2013 - EDA & EMC Morning Session

"DAC 2013: carpe diem with Ten in Texas" by Peggy Aycinena

MEDIA ALERT: Secrets of Design for Yield to Be Explored During 50th Design Automation Conference Pavilion…

L-3 Link Simulation & Training Cuts Engineering Change Orders by Ninety Percent Using Capital Software…

Si2’s OpenDFM Standard Gains Industry Support

"IP exerting its presence at DAC" by Ed Lee

Sonnet® Announces Blink™, the New Simulation Tool for the Modern IC and PCB Designer

IPC Offers Enhanced PCB Library Documentation with IPC-7351 Land Pattern Standard

EnSilica partners with Cross Border Technologies to accelerate sales growth in key European and Asian…

Cadence Introduces the Tempus Timing Signoff Solution, Delivering Unprecedented Performance and Capacity…

Agilent Technologies to Demonstrate Leading-Edge RF/Microwave Design and Test Solutions at International…

International Premiere of COSIDE® at the DAC 2013 in Austin, Texas

“Cooley’s DAC Troublemaker Panel” on June 3 @ DAC - Registration

Aldec Launches Spec-TRACER™ – Requirements Lifecycle Management for Safety-critical FPGA and ASIC…

"Sanjiv Kaul: Calypto and HLS to seize the day" by Peggy Aycinena

"System Verilog Queues which can shrink and grow !" by Ankit Gopani

Interview with Bob Potock, VP Marketing at Kozio

50th DAC Announces First Ever Training Day to Keep EDA Updated on Latest Design Techniques

Mentor and Tezzaron Optimize Calibre 3DSTACK for 2.5/3D-ICs

Lenovo Launches Re-Branded LenovoEMC Storage Solutions in North America

Oasys Announces Floorplan Compiler

Ausdia Receives Patent for System and Method for Automatically Managing Clock Relationships in Integrated…