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Articles for the last 30 days.  Older

Video: Calibre InRoute - Signoff Metal Fill Insertion, CMP Impact and Olympus Timing Analysis

Audio Interview: "DVCon 2012 Insider: Tech. Papers, Tutorials, Keynote, Industry Leaders Panel and …
ON Semiconductor Standardizes on ClioSoft SOS™ Hardware Configuration Management Platform …
CSR Selects Synopsys for Advanced-Node SoC Design
Dassault Systèmes Posts Record Revenue and Earnings in 2011 as PLM Adoption Drives License Revenue …
Dassault Systèmes Opens New Horizons with 3D Experience
Video: Calibre InRoute - Signoff Litho (LFD) Analysis and Automated Repair
27 of 33 IC Product Categories Will See Market Growth in 2012 says IC Insights
Marcy: The Hunt for Other Worlds
IBM, Samsung and GLOBALFOUNDRIES to Showcase Next-Generation Chip Technology at March Forum
Nominations for EDA Consortium Board of Directors Are Closing Soon
Breker Verification Systems Closes Calendar Year 2011 With 150% Growth
At DVCon, Real Intent Verification Experts Present on Resolving X-Propagation Bugs; Demos Focus on …
Video: Manufacturing Closure for Advanced Node Designs within Place and Route
Apache Design's RTL Power Model Technology Honored With DesignCon 2012 Award
Accellera Systems Initiative Announces "Accellera Systems Initiative Day" at Its 2012 Design and …
EVE Named Event Sponsor of SemIsrael Verification Day February 14 in Tel Aviv
AWR Expands Patent Portfolio and Receives Patent for Automatic Creation of Vias in Electrical …
Altium and FTDI Chip collaborate on new board-level components
Juniper Networks Adopts Jasper Formal Technology to Mitigate Design and Verification Risk
Video: Computational Lithography Solutions for 22nm and Beyond
Video Tutorial: Better PCB Power Design with DC Drop Analysis
New EDA Weekly - Silicon Valley: EDA Magnet!
NI Multisim 12.0 Offers Complete Solution to Optimize Circuit Performance for Professionals and …
Cadence Collaborates With Samsung Foundry to Deliver Design-for-Manufacturing Solution for 32-, 28- …
VS1005 – All-In-One MP3 Audio System-on-a-Chip
IEDEC Announces Program, Focus on Excellence in Interdisciplinary Engineering Education, Mar. 19
Video: Accelerating Schematic Driven Layout of Analog ICs
Verific Design Automation Adds UPF 2.0 Support to Growing Parser Platform
New Blog: What Would Joe Do? by Peggy Aycinena
Symtavision to showcase new versions of SymTA/S and TraceAnalyzer at Embedded World 2012
Cadence Reports Fourth Quarter and Fiscal Year 2011 Financial Results
Video: Creating Differentiated Technology in Silicon
SiSoft, Ericsson and SiGuys Present Case Study of Virtual Prototype Analysis at DesignCon 2012
STARCHIP Acquires Contactless Technology through Partnership with CEA-Leti
Video: Accelerating Mixed-Signal Design for Low Power using Titan
Major New Functionality for SI/PI Engineers in CST PCB STUDIO 2012
AWR E-News Jan. 2011: Thermal Analysis White Paper and SDR Application Note
STARC Selects Orora’s Automated Behavioral Model Generation Solution for Next-Generation Analog …
Cortus and SST to Jointly Exhibit Low Power IP Solutions for System on Chip (SoC) Design at …
Video: Challenges for Digital Timing Sign-off at the 20nm Node
Mentor Graphics Announces Major New Functionality in HyperLynx Release 8.2
SiSoft Presents Tutorial on IBIS-AMI Model Quality at DesignCon
Sigrity Expands Global Sales and Support Operations to Keep Pace with Growth Worldwide
Nimbic Board of Director Jim Hogan to Participate in DesignCon Panel on 3D Design Standards
MILMEGA Utilizes AWR Software and Cree Non-linear Models to Design Compact, High-Power, …
Reminder: EVE to Exhibit at DesignCon 2012
Video: Accelerating Analog IC Layout with Current Mirrors
Simberian Showcases Simbeor 2012 at DesignCon
Nominations for 13th Annual Marie R. Pistilli Women in EDA Achievement Award due Mar. 9
Runtime’s LicenseMonitor™ Helps Husqvarna Reap 90% License Usage
Video Tutorial: Power Management Cells in Low Power Design
India SystemC Users Group - Call for Contributions
Apache Design Sponsors Chip-Package-System Workshops At DesignCon 2012
Video: Synopsys USB 3.0 Host and PHY Interop with USB Devices of All Speeds
Accellera Systems Initiative Announces Call for Nominations for 2012 Technical Excellence Award for …
IP Showcase: Non Volatile Memory IP for Analog and Mixed Signal Design
New Kilopass MemoryPill Newsletter
Tanner EDA to Participate in Jan. 31 DesignCon Panel: Is It Time for an Analog Comeback?
Yamaha Standardizes on Synopsys' Processor Designer after Cutting DSP Development Time in Half
Synopsys Collaborates with Sigrity to Accelerate Signal Integrity Analysis
Video: Cool Things You Can Do With the Discovery Visualization Environment (DVE) — Searching And …
Manage Your Cadence Virtuoso Libraries, PDKs and Design IPs: ClioSoft to Hold Webinar on Jan. 31
EVE to Exhibit at DesignCon 2012 New ZeBu-Blade2 Verification Platform
Si2 Organizes 3D Panel at DesignCon 2012
Carbon Design Systems Posts Record Sales
Altera Adopts the Mentor Graphics Veloce Hardware Emulator to Accelerate Time-to-Market for their …
Vitesse Semiconductor, LeCroy Corporation and Wild River Technology to Present at DesignCon 2012
Video: Synopsys DesignWare PCI Express 3.0 with LeCroy Protocol Test Suite
Synopsys Acquires ExpertIO
Aldec Adds Documentation for Safety-Critical Designs in ALINT™ 2012.01
Packet Plus™ and Dini Group Partner to Provide New Approach to Debug Networking on Logic …
Fujitsu Semiconductor Expands Use of Calibre for Advanced IC Physical Verification and Design for …
Concurrent Analysis Corporation Announces the Launch of Lumino Modeler and CAEFEM 9.5
Video: Synopsys DesignWare SATA 6 Gb/s AHCI Host Controller and PHY
Video: Cool Things You Can Do With the Discovery Visualization Environment (DVE) — Debugging UVM …
New Tech. Paper: Randomization and Functional Coverage in VHDL
Molex Experts Showcase Complete High-Speed interconnect Solution at DesignCon 2012
Aldec Design and Verification Newsletter Q1, 2012
Do-It-Yourself EDA Flows Take Off in 2012
Picochip Achieves First Silicon Success for 40-nm picoXcel Femtocell Chip Using Synopsys' Lynx …
Xilinx Announces ISE Design Suite 13.4 Further Extending 7 Series FPGA Support and Design …
EMA Automates PCB Footprint Generation With New App for Allegro PCB Design
Triad Selects Berkeley Design Automation Analog FastSPICE™ Platform for Verification of …
SuVolta Expands Commitment to Magma's FineSim SPICE
Cadence Publishes Definitive Book on Advanced Verification for Today's ICs
Accellera Systems Initiative Announces Call for Nominations for 2012 Technical Excellence Award for …
MIPI® Alliance Features New Specifications, Member Demos and Presentations at Mobile World Congress
Altia Unveils Nationwide ‘GUI Design Contest’ - Grand Prize includes $2000 scholarship plus …
New Careers Corner: A BILLION DOLLAR AQUSITION YEAR... The Synopsys Magma Merger, what it really means to Career Prospects for 2012
Mentor Graphics Appoints Three New Executives
Planar Portfolio within AWR Connected for Antenna Magus Grows 50%
Agilent Technologies Announces Availability of Mitsubishi Electric’s Nonlinear RF Model Library …
Real Intent Solidifies Leadership in Clock Domain Crossing
Avery Design Systems Announces MIPI UniPro and UFS Verification Solution
The EDAA Lifetime Achievement Award 2012 goes to Alberto L. Sangiovanni-Vincentelli
Articles for the last 30 days.  Older



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AWR E-News Jan. 2011: Thermal Analysis White Paper and SDR Application Note

KiloPass MemoryPill, Issue #1 January 2012
News from Apache Design - January 2012
Cadence News Jan. 2012: Save on CDNLive! - New Advanced Verification Book - 2012 Forecast
Aldec Design and Verification Newsletter Q1, 2012
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DVCon 2012 Technical Program and Registration, Feb. 27 - Mar. 1

Common Platform Technology Forum, March 14: A Decade of Invention… A World of Solutions
Sensors - Technology, Design & Application - March 21 Santa Clara CA
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ICCAD 2012: Preliminary Call for Papers due April 16
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