June 07, 2010
Silicon Valley Residency Not Required
Please note that contributed articles, blog entries, and comments posted on EDACafe.com are the views and opinion of the author and do not necessarily represent the views and opinions of the management and staff of Internet Business Systems and its subsidiary web-sites.
Gabe Moretti - Contributing Editor


by Gabe Moretti - Contributing Editor
Posted anew every four weeks or so, the EDA WEEKLY delivers to its readers information concerning the latest happenings in the EDA industry, covering vendors, products, finances and new developments. Frequently, feature articles on selected public or private EDA companies are presented. Brought to you by EDACafe.com. If we miss a story or subject that you feel deserves to be included, or you just want to suggest a future topic, please contact us! Questions? Feedback? Click here. Thank you!

The concentration of companies serving the needs of electronic systems designers and developers in the San Francisco Bay area is remarkable. I think it is mostly due to the opportunity enterprising technologists have to start a new company without moving. Historically the area was the site of almost all semiconductors design and fabrication, although now there is hardly any fabrication going on there, and system houses, not semiconductor companies, are the largest costumers of EDA tools.

Non the less, one almost expects that an EDA company would have its headquarters in Silicon Valley.


But this is not always true. I have found two interesting and growing companies located outside the valley that offer significant products: Tanner EDA and Zocalo Tech.


Tanner EDA


Tanner EDA (www.tanner.com) is the part of Tanner Research that develops and markets EDA tools. Tanner Research is located in Monrovia, CA. Monrovia is a town not far from Pasadena, where you can find Caltech and JPL, and attend the world famous Tournament of Roses. In other words, a hub of technological activity focused on system level design and development. Also one of the leading centers of research not just in the US but in the world. Tanner Research connection with Caltech is embodied in its Chief Scientist, Dr. Massimo Civilotti. Dr. Civilotti earned his Ph.D from Caltech , where his advisor was Dr. Carver Mead.


When Tanner Research was founded in 1988, its offices were in Pasadena. It moved to Monrovia is 2006. Monrovia implemented a 30 years redevelopment plan completed in 2003 that transformed it from a poor community with ramshackle homes into an attractive community that offers some of the best quality of living to be found at the foot of the San Gabriel mountains, in the shadows of Mt. Wilson Observatory.


Tanner Research, Inc.is a leader in various facets of microelectronic design. To streamline the design process, Tanner Research also provides training and consulting services for its customers. The areas of consulting expertise include integrated circuit and micro-electro-mechanical systems (MEMS) design. The advanced research and development arm of Tanner Research is focused on applications that promise to deliver unprecedented capabilities, including image processing, speech recognition, laser interferometry, and optical communication.


Tanner Research has been enjoying consistent growth since it was founded. The company has been named to the Deloitte & Touche's Fast 50 Award for five years in a row. The company has also been named by L.A. Business Journal as one of the 100 Fastest Growing Private Companies in Los Angeles County for three years in a row.


On April 27th Greg Lebsack, President of Tanner EDA, presented the company to a collection of international editors during the Globalpress event in Santa Cruz. The company has so far served over 33,000 customers in 67 countries offering a full suite of tools for Analog/Mixed Signal design. During his presentation Mr. Lebsack introduced the analog market segment by stating that "The digital revolution has changed the way we communicate, work, and travel. However, the promise of digital technology is only as good as the ability of the analog technologies that faithfully reproduce digital language of 1's and 0's into analog signals that can be hard, seen, felt, and perceived by humans".


EDA industry sales supporting analog, mixed/signal, and RF designs where approximately $1 billion in 2009. The majority of designs in the segment where implemented at 90nm or larger geometries. These designs require complex architectural decisions, and deep understanding of semiconductor physics. But, in comparison with digital implementations, these designs lack automation and are often considered an art form. Tanner EDA has a diverse foundry portfolio that supports fabless system companies, as well as companies that also have their own internal fabrication facilities. In the first category they support: TSMC, UMC, TowerJazz, Xfab, Dongbu, and AMS. The latter category includes
TI, Analog Devices, Maxim, and Fairchild.


Tanner EDA is targeting the layout of analog circuitry as its primary area. Analog layout is expensive, non-scalable, and non-repeatable. It requires robust tools that will also support business productivity and cycle time requirements. The company has labeled its efforts in this market as "Analog Acceleration". The approach includes:
  • Recognition and generation of common structures such as Differential Pairs, Current Mirrors, Resistor Dividers,
  • Correct by construction,
  • Consistently high quality layout that is closely aligned with handcrafted layout,
  • Is "silicon aware" because it understands functionality and process artifacts, and
  • Allows designers to easily tune the design by providing a rapid generation and simulation loop for optimal solution.
  • The latest tool released by the company is HiPer DevGen, which stands for High Performance Device Generator. First users of this product are mainly in Europe and Asia. The idea is to strike the right balance between productivity and quality.


    To achieve the goal Tanner EDA offers integrated, cohesive tools that have a common user interface. The goal is to reduce design kick-off time to hours instead of weeks. As a smaller vendor the company must make sure that their tools can be quickly and flexibly integrated in the design flow and that they support industry standard data file formats.

    Cost is an important component of productivity. The products must offer the best price/performance, require minimal support, and require minimal ramp up time. John Zuk, Vice President of Marketing and Strategy, is confident that his company has reached these goals and is delivering analog design innovation to its customers.


    Zocalo Tech


    Zocalo Tech (www.zocalo-tech.com) is located in Austin Texas. The capital of Texas, located on rolling hills in the southeastern portion of the state, has a charm of its own and calls itself "The Music Capital of the World". It has grown considerably since the time in the early 1980's when I used to travel there for work, developing the second source agreement for the 68000 CPU between Philips and Motorola. Yet, it has kept its charm as a refuge for artists and creative people of all kinds. Austin has a long tradition in the semiconductors field. So much so, in fact, to earn the nickname "Silicon Hills". I am still not sure that claiming to be built of sand, whether it is a
    valley, a forest, or hills, is really something to be proud of. Clearly I need to start a semiconductor company where I live, on the Gulf of Mexico, so that this county can be called "Silicon Beach".


    Zocalo Tech is a young small technology company, incorporated in 2006. As with many startups based on technological expertise, the company developed a couple of products before finding the right market segment. Often the technology is ahead of the market demand, and just because a product is robust does not mean that there is sufficient demand for it.


    Zocalo initial development was directed to technology assuring that test bench, design and verification plan stayed in sync. Zocalo developed its own SystemVerilog elaborator and parser allowing incremental update for any design modifications. Additionally, technology was developed to keep the verification implementation in sync with the test plan, by producing them from a single source. As with many start-ups, other opportunities to use the technology became apparent. Assertion Based Verification was a growing market that could use automation.


    Properties are facts about a design that must always or never be true. Assertions are software monitors placed in the design to assure the properties are adhered to during simulation. Through usage, the terms assertion and property are often used interchangeably. The prevalent language today for writing assertions is SystemVerilog Assertion Language. Assertions written in this language are referred to as SVAs.


    Howard Martin, the company President, told me that "at that time there was lots of buzz about Open Verification Library (OVL) and the big three each had their own assertion libraries. However, all of the libraries were time consuming and error prone to use manually. Our first product, Zazz OVL, was introduced at DVcon 2009 and released in June 2009. In addition to providing automation for quick and easy use of assertion libraries, Zazz OVL provided automatic bind files and documentation. Both required for enabling Assertion Based Verification."


    As it turned out this product had minimum market pull. There was minor if any use of Assertion Based Verification(ABV). The method requires the use of assertions as part of the verification methodology and market surveys indicate that less than 40% of the projects used assertion. Designers use ABVon an ad-hoc basis dependent on their skill and desire to use them. In the world of ad-hoc use, bind files and documentation are not required. Although assertion libraries can be classified as simple assertions, designers think they are inflexible. The use of SVA is much more prevalent than using a more structured
    ABV method.


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    -- Gabe Moretti, EDACafe.com Contributing Editor.


    Reviews:
    Review Article
    • And of the Big 3 in EDA ... June 08, 2010
      Reviewed by 'Gary Dare'
      And let's not forget ...
      Mentor Graphics Corporation - Wilsonville (Portland), Oregon! :)

        3 of 3 found this review helpful.
        Was this review helpful to you?   (Report this review as inappropriate)


    • Others outside the Valley June 07, 2010
      Reviewed by 'Gary Dare'
      Gabe, here are a few others located outside of Silicon Valley. I hope that other people will contribute to this list as well!
      Magillem - Paris, France (IPO in late 2009 was the most under-reported story in EDA!)
      Space Codesign - Montreal, Quebec, Canada (ESL spin-out from Ecole Polytechnique, U de Montreal)
      Binachip - Deerfield (Chicago), Illinois (the other start-up by Prith Banerjee, now head of HP Labs, while a professor at Northwestern University)
      PDTi - Vancouver, BC, Canada (SystemRDL, etc. by Jeremy Ralph, ex-Intel Canada)
      Agnisys - Delhi, India (CEO Anupam will be at DAC)
      Please add to this list ... thanks! :)

        4 of 5 found this review helpful.
        Was this review helpful to you?   (Report this review as inappropriate)


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