January 20, 2003
Herscher lives for the moment at Cadence
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Simplex acquisition brings powerful technology and leadership in-house
Vice President and Chief Marketing Officer at Cadence Design Systems, Inc. in San Jose, CA.
And in this corner - more consolidation
Synopsys, Inc. and Numerical Technologies, Inc. announced on January 13th that they have signed an agreement for Synopsys to acquire all outstanding shares of Numerical's common stock for a cash purchase price of $7.00 per share. Aart de Geus, Chairman and CEO at Synopsys said, “Design-for-manufacturing issues will continue to gain importance as designs inevitably shrink toward the 65-nanometer mark. Combining Numerical's lithography-enabling solutions with Synopsys' design tools will enable us to further reduce costs and manufacturing risk for customers involved in creating smaller, faster, and more power-efficient chips.”
The acquisition will be effected by means of a cash tender offer of all of the outstanding shares of Numerical for a cash purchase price of $7.00 per share, followed by a second-step merger in which Synopsys would acquire any untendered Numerical shares at the same price per share. The total transaction value is approximately $250 million and is expected to close during the Q1 2003.
Numerical Technologies went public in a highly touted IPO in Q2 2000, propelling company founder and then CEO, Y.C. (Bruno) Pati, into a position of mentor and role model for other design automation company executives also hoping to go public. The company's stock valuation, since the heady months after the IPO, has endured a slow decline consistent with the market. Last month, company CEO Larry Hollatz was replaced with an interim President and CEO, Naren Gupta.
Meanwhile, Cadence Design Systems, Inc. announced January 15th that it has acquired Celestry Design Technologies, Inc. Cadence says the acquisition adds to the company's product offerings in silicon modeling, expands its expertise in process and manufacturing technology, and provides customers full-chip circuit simulation technology. Per Lavi Lev, Executive Vice President and General Manager of Cadence IC Solutions business: “This acquisition underscores our commitment to deliver great technology to our customers, and it strengthens our already considerable links to the foundries.”
According to Cadence, the Celestry acquisition is part of the company's strategy to acquire companies whose technologies complement its own product development, to increase its ability to provide customers with end-to-end design solutions, and to advance the Cadence Design Chain Initiative strengthening development relationships throughout the electronics industry. Zhihong Liu, President and CEO of Celestry, has been named a Cadence Corporate Vice President reporting to Yaakov Milstain, Corporate Vice President and General Manager of the Cadence Custom IC group. Cadence says it will retain most of Celestry's employees and will continue to support all of Celestry's customers and products.
Other Industry News
crucial for Agere's storage system-on-a-chip (SoC) designs, incorporating other drive functions including an embedded microprocessor, memory and hard disk controller into a single integrated device.
Debussy with an updated FSDB writer, and overall VHPI/PLI optimization. The new release also includes additional support for PLI (VPI) functions.
president of marketing for Marconi's Broadband Routing and Switching group. The Stratix, APEX 20K, and Mercury FPGAs supplemented the ASICs designed and developed by Marconi in the BXR-48000, and aided in the development of the protocol- and payload-agnostic switch-router.
Analog Design Automation, Inc. (ADA) announced that it has closed $8 million in Series B financing, bringing total funds raised to $17 million. The funds will be used to support and expand ADA's marketing and sales activities and for R&D on the company's Genius optimization and performance trade-off exploration products.
Cypress Semiconductor Corp. announced the release of its timing development tool suite, CyberClocks. The software addresses timing design by introducing a black-box approach to configuring programmable clocks. While traditional software models cater to engineers who understand phase-locked loop (PLL) technology, the black-box approach of CyberClocks enables the designer, without knowledge of the workings of a PLL, to specify input and output clock requirements while the suite computes the optimal configuration. The suite's embedded design rule checking promotes stability in the PLL system under all valid programming conditions and data sheet parameters.
workflow across a global supply chain.
power management features to help extend battery life.
which need to be protected, designers adopting M-RoCKIT reduce design time by 4 times, while saving up to 15% silicon overhead for non-maskable memories and up to 8 times for maskable ones. The M-RoCKIT data sheet is currently available. The beta version will be available for selected customers and alliance partners within Q1/03 while final product pricing and delivery is expected within the first half of 2003.
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-- Peggy Aycinena, EDACafe.com Contributing Editor.
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