December 15, 2003
True Circuits' Stephen Maneatis
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Stephen Maneatis is the CEO of True Circuits, Inc. The following commentary on the business and technology of analog IP were made during a recent lengthy phone call and provide an interesting point/counterpoint to the comments from Adam Kablanian in the
December 1st issue. Please read for the larger lessons, not for the specifics or the messaging about the company.
“True Circuits is a provider of analog and mixed-signal IP for the semiconductor, systems and electronics industries. Our focus now is on timing IP, which we license through library partners and directly to end customers. We're seeing a strong pickup in a number of market segments right now - both with IDMs and with smaller AISC and FPGA firms - which is exciting for us as it means an increase in licensing of our IP.”
“These days, analog and mixed-signal IP are viewed as one and the same. A customer is either buying digital or analog/mixed-signal IP. These involve two different areas of design expertise with different competencies. Of course, it's analog/mixed-signal IP that's gaining in importance as more and more chips are developed for communication applications, so that is good for us.”
“There are a lot of physical issues at 130 nanometers or 90 nanometers that an analog engineer has challenges with - shrinking a digital design is doable as you move to smaller process nodes, but shrinking an analog circuit is just not that simple. And right now, we're seeing a shortage of experienced analog engineers. For instance, we hired an employee within this past year who was a digital engineer - a very smart guy - and with some training and mentorship, he was able to pick up on the analog issues and successfully perform mixed-signal design work. But more typically, you've got engineers who are trained, or are passionate, either in digital or in analog - but not both.”
longer have that kind of expertise in-house. Design reuse and third-party IP have now become a necessary and economical way of getting products to market without having [to bear the burden of] in-house analog/mixed-signal design teams.”
“Second, there are concerns about the quality and reusability of IP. Is it practical for a company to license and use IP from a third party that is basically a black box and be confident that the IP will work after it's integrated into their design? Related to that, can a customer truly reuse the third party IP and thus amortize its cost over the lifetime of the product? This second issue is where companies, both big and small, have an aversion to licensing IP.”
be able to drop our IP into their chip and know that it's broad enough in its design and flexible enough by its pin-programmability that changes in the larger design of the chip can be accommodated by the original piece of IP rather than requiring compromises.”
process generations, and fabrication vendors. We do considerable amount of R&D and are constantly improving our circuit technologies. Using our proprietary CAD environment and design flows, we can easily port new technologies to new or old process generations and to any fabrication vendor. We've got a broad portfolio of timing IP - DLLs and PLLs - and our customers can pick any item from our IP catalog, license it, and know that we'll provide a hard macro ready to integrate into whatever chip or circuit they're designing. It's a seamless process.”
need to offer zero support - that we've understood a customer's requirements and provided the right IP that they can easily integrate and reuse. If a customer is satisfied the first time and they know we've got good IP and a good support model - we'll win that customer for life.”
so all IP cost is known and paid upfront.”
“There are potential issues with IP piracy. We track reuse by building relationships with the companies we work with. Of course there's an honor system associated with all of this. And now that we're working with more and more customers, we are happy that the VSIA tagging system - complete with IP reference number - is in place so the major fabs can look at the appropriate layer in a chip and verify that a particular piece of IP is being used by that customer.”
“Our current strategy is primarily based on the honor system. It requires the players [in the design and manufacturing chain] to report out on their use of our IP. Our biggest concerns are, therefore, that our IP can be reused by a current customer without a fee being paid, or worse, that it might be reverse engineered or propagated - ending up systematically incorporated into other companies' technology. At this time, we have quite a number of patents either issued or pending on our IP. We always make sure the patent process is in place before we publish in leading technical journals - and we make sure that the licensing agreements are clear and up to date.”
someone has got your GDSII and the things that go with it - they might, unfortunately, decide to
pursue a direction that's parallel with what we've done.”
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-- Peggy Aycinena, EDACafe.com Contributing Editor.
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