September 06, 2004
Design for Manufacturability (DFM)
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Jack Horgan - Contributing Editor


by Jack Horgan - Contributing Editor
Posted anew every four weeks or so, the EDA WEEKLY delivers to its readers information concerning the latest happenings in the EDA industry, covering vendors, products, finances and new developments. Frequently, feature articles on selected public or private EDA companies are presented. Brought to you by EDACafe.com. If we miss a story or subject that you feel deserves to be included, or you just want to suggest a future topic, please contact us! Questions? Feedback? Click here. Thank you!

Introduction


In many industries there is a proverbial wall between those who design (designers, engineers, draftspersons, …) and those who manufacture, build, construct or process a product. The image is that the design is thrown over the wall with little attention given to the needs of those on the other side. It would seem axiomatic that tearing down this wall or at least poking holes in it should be beneficial.


Several decades ago I worked for an Architectural/Engineering firm that designed major projects such as fossil fuel power plants and hydroelectric plants. A chronic problem in the industry was the discovery in the field of interferences between beams, HVAC ducts, pipes, electrical raceways, lighting fixtures, pieces of equipment and so on that appeared on the drawing to occupy the same physical space. Since this was physically impossible, something had to be moved in the field. Regardless of what was moved, some engineering design drawings were now wrong. Any engineering analysis related to the item(s) moved was now suspect. The updating of drawings to As Built and the rerunning of
analysis programs was a typically a haphazard affair. Further, there was a cost in time and dollars incurred by the contractor to relocate the offending item(s). It was not uncommon to have thousands of interferences of varying degrees of seriousness in a major construction project. The two most common techniques to identify possible interferences during the design phase were isometric drawings of combined engineering disciplines in regions of likely interferences and the construction of scaled models. The two approaches were error prone and had difficulty keeping pace with the design teams. I was part of a small software group that developed a computerized system to collect data from
paper drawings, construct a model of the plant and report on the interferences. The system was used on several projects with considerable success. Today commercial plant design programs offer similar capabilities. They also enable a designer in one engineering discipline to work in the context of the other disciplines even referencing items in those disciplines.


Over the years that has been considerable press in the mechanical CAD industry on design for the “ilities”: quality, assemblability, manufacturability, testability, maintainability and so on. Much of the touted benefits of Product Lifecycle Management (PLM) and its predecessor Simultaneous or Concurrent Engineering are attributable to the sharing of design information during the early stages of a product lifecycle with those responsible for downstream tasks. Collaboration is the key. Within the MCAD arena there are
numerous applications (stress, fluid, hydraulic, thermal, kinematics, dynamics … ) to evaluate the performance of a design. There are also many Computer-Aided Manufacturing solutions for driving numerically controlled machines (drill, mill, lathe, punch, laser, and edm), coordinate measuring machines and robots. And there are programs for simulating the manufacturing flow. The same software used to design parts can be used by manufacturing engineers to design tools, jigs and fixtures. Having libraries or catalogs of standard parts, helps reduces part count, lowers procurement time and costs and reduces manufacturing risk and cost. Interference and clearance calculations along
with
animation capabilities can be used to assess assemblability. Design rule check can be driven by user defined features. For example, user defined holes can be used to restrict holes to allowable sizes and shapes. However, DRC is far less pervasive than in the semiconductor world. There are few mechanical applications that can be truly be classified as Design for Manufacturing.


Compared to the architectural and mechanical industries, the semiconductor industry has considerably more time pressure, shorter product lifetimes and more rapidly changing technologies. As the industry moves from process node to process node, the physical limits of manufacturing technology are being challenged. This situation has increased the need for Design for Manufacturing as reflected in the comments of executives from leading EDA vendors.


At the DAC in June Wally Rhines, President and CEO of Mentor Graphics, gave a keynote address entitled: “EDA Industry Growth - Are there enough new problems to solve? (that people will pay for?)”. He answered his own question in the affirmative. He further identified new EDA methodologies as the primary source for growth as it has been in the past. From a short list of possible candidates to drive the next wave of growth he nominated Design for Manufacture. He was confident in his nomination because it is already growing at such a pace (from $200M to $500 million in less than 5 years) that it is preordained. It has the largest growth rate in the industry. Resolution
Enhancement
Technology (RET), the first wave of DFM, has grown in a few short years from essentially $0 to a couple hundred million dollars. The reasons for DFM's growth are:
- Enormous potential cost savings for semiconductor manufacturers

- Extended lifetimes of existing photolithography equipment

- Yield enhancements at sub-100nm feature size

- EDA expenditures are a nit compared to capital goods equipment budgets and manufacturing cost of goods sold
In July at Semicon West Dr. Aart J. de Geus, Synopsys Chairman of the Board and CEO, delivered a keynote address entitled “Design for Manufacturing: Hand in Hand, not Hand-offs”. During his address he pointed out that while the number of transistors per chip has been increasing as the industry moves from one process node to another, the probability of operating as expected and of meeting specification has decreased and the probability of full mask set respin has gone up. Success has become more difficult. The move to 130nm was painful due to the shift from Aluminum interconnect metal with Silicon Dioxide dielectric between the metal lines to copper metal and low k
dielectric
materials. “The number of design rules exploded by a factor of 5 to 10, some directly conflicting with others. This creates a challenge for design tool providers. Traditionally design and mask making and fabrication have been segregated, handing off GDSII files from design to manufacturing and design rules from manufacturing to design. We are moving increasingly from a black and white world to a world where there is the need to optimize against a set of complex objectives and rules. Therefore there is a need for a better understanding and a set of linkages between design and subsequent steps. This opens the age of Design for Manufacturing which requires a complete silicon
infrastructure with communication and algorithms that can optimize against manufacturing constraints.” He recommended using design intent as a means to reduce mask costs.


On Feb. 24, 2004 Magma Design Automation Inc. announced the signing of a definitive agreement for the acquisition by merger of Mojave, Inc., a developer of advanced technology for integrated circuit manufacturability and verification. Rajeev Madhavan, Magma's chairman and chief executive officer, said "Design for manufacturing, or DFM, issues will continue to gain importance as designs shrink toward 65-nanometer and smaller geometries." and “We believe that performing DFM analysis and correction concurrently with implementation leads to a better quality design, which in turn leads to improved manufacturability.”


On June 7, 2004 Cadence Design Systems, Inc. and ASML MaskTools, announced a software licensing and joint development agreement for advanced resolution enhancement technology (RET) software solutions. The two companies will work together to develop a tightly integrated design for manufacturability (DFM) flow. Lavi Lev, Cadence EVP and GM said "The extension of optical lithography techniques at and beyond 65 nm emphasizes a new level of interdependence between design and lithography. Our customers want to shorten production ramp and improve volume production yield through the use of the most advanced design tools linked to the most advanced technologies for resolution enhancement."




Lithography


Before investigating the current sate of DFM, let us first review the fabrication process for ICs. To make an integrated circuit a layer of either electrically insulating or electrically conductive material (i.e. metal, polysilicon, oxide) is deposited on the surface of a silicon wafer. This material is then coated with a photosensitive resist. An image of a photomask containing a precise image of the circuitry is projected onto the wafer. The wafer is developed and then etched to remove material from the areas exposed with the photomask image.


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-- Jack Horgan, EDACafe.com Contributing Editor.


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