January 31, 2005
Please note that contributed articles, blog entries, and comments posted on EDACafe.com are the views and opinion of the author and do not necessarily represent the views and opinions of the management and staff of Internet Business Systems and its subsidiary web-sites.
Jack Horgan - Contributing Editor

by Jack Horgan - Contributing Editor
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Webster's Collegiate Dictionary defines collaboration as “to work jointly with others or together esp. in intellectual endeavors”. There are two types of collaboration, namely sequential and parallel. In the case of sequential collaboration the output of one activity or stage is accepted as input to the next where it is processed and delivered or output to the next stage. The simplest example is a bucket brigade where material (water, sand bags, packages, ..) is passed hand to hand from the front of the line to the end of the line. A more complicated example is the construction of a multistory building. No matter how hard one tries, you can not start with the roof. One
has to lay the
foundation first and then the intervening floors before starting on the roof. Parallel collaboration can be further broken down into two types. The first type is where later activities or at least the knowledge and expertise of later activities are brought to bear on the early stages of a project thereby accelerating time to completion. Errors of commission and omission are detected and corrected early where cost and time to change are smallest. This approach has often been referred to as simultaneous or concurrent engineering. This is the fundamental value proposition of EDA and CAD in general. Through simulation, design for test and design for manufacturing technologies and so forth
designs are analyzed and/or synthesized with the knowledge of downstream applications shrinking the time and cost of those activities. The second type of parallel collaboration is where multiple individuals or groups perform the same or similar tasks at the same time. Let us return to the example of the multistory building. Assume that each floor is to be occupied by a different tenant and hence the interiors of each floor will be different. The design and later the build out of each floor can be carried out independently. This is a spatial segmentation or partitioning of the work effort. For any given floor there will be design and subsequent construction involving different
disciplines, i.e. HVAC, electrical, lighting, and structural. While the disciplines are independent the physical items e.g. cable trays, beams, ceiling panels, walls, ducts and pieces of equipment, can not occupy the same space. Coordination across the disciplines is required. Previous editorials have addressed the first type of parallel collaboration. This commentary is about parallel collaboration of the second sort, specifically for printed circuit board layout.

Mentor Graphics has two products, TeamPCB and XtremePCB, which enable multiple designers to work simultaneously on PCP layout design.

TeamPCB is the earlier product having been introduced in July 2003.

First a lead designer identifies a number of reserved areas defined by closed polygons. Then the design is split into multiple partitions.

Each partition includes the data from the entire master design prior to the split. Any objects wholly inside the reserved area associated with the partition are completely editable, while objects outside the reserved area will be locked. Objects crossing the reserved area border are locked; except for traces, which are split at the border of the partitions. Placement, routing and drafting functions are all allowed in a partition; Designers can even auto route a partition or run simulation routines. Each partition can be edited and saved individually. While editing a partition, designers may change the clearance and trace width rules to suit their particular needs.

When a connection starts in one partition and ends in another, the designer may insert a guide pin (akin to a virtual pin) to guarantee that the connection will be routed to the same point at the edge of the reserved area. Guide pins may also be used for connections that do not start or end in a partition, but run through it.

At any time the designer may synchronize the graphics outside his area by requesting any data that the other designers have saved.

At each step in the process the status of the original design and its partitions are monitored to prevent accidental data.

XtremePCB was introduced in
November 2004. This product does away with the split-and-join paradigm and allows multiple designers to simultaneously work on a single data base and to see all other client edits in real-time. This new technology employs an Xtreme Design Session manager (XDS) and multiple Xtreme Design Clients (XDC) in a networked environment. The session manager's primary activity is to receive update requests from each client, check them to ensure no design rule violations are made and then synchronize all clients with the updates.

The design is initially loaded on the server and each client is initialized and synchronized when joining the session by the automatic downloading of the current state of the server design into the client memory space. Once a client has joined the design session, edits on the design may be made using the standard editing tools available in the application.

An edit event is a discrete action by a client that is captured and sent to the server as an update request. For example, moving a part from point A to point B is an event. The edit event is sent to the server as a transaction describing what is to be deleted and what is to be added. Whenever an edit event occurs on a client, a local design rule check (DRC) is performed prior to that event being sent to the server. The server takes the edit request, integrates it into the design database, performs a DRC and if no violations are found, the edit is approved and sent through an Output Message Queue to all the clients for synchronization of the client in-core databases. The client that made
the original request does not have the edit event completed until the server broadcasts the update to all clients. If the server determines that the edit event creates a DRC violation, it can attempt to correct the error. If it cannot be corrected, then the edit event will be rejected and only the client that made the request will be notified of the rejection.

The effectiveness of this technology is dependent upon its ability to automatically resolve or prevent conflicts between designers or automatic processes. Some potential conflicts and resolution mechanisms include.
Timing Collisions - To prevent multiple clients from editing the same object at the same time, the object is reserved for the first client selecting it.

Permanent Protection - A client may lock objects, preventing other clients from editing those objects while they are locked.

Temporary Protection - A client may draw a complex polygon as a reserved area.

Sandboxes - clients may define an area by layer that is reserved for what-if design work.

Force Fields - a dynamic area of protection whose size is within limits proportional to amount of a client spends actively working in an area. Other clients may not click within another's force field.
XtremePCB is compatible with a variety of network environments, including symmetrical multiple processors (SMP), local area networks (LANs) and wide area networks (WANs). Minimum bandwidth is 300Kbps and maximum latency is 200 ms.

The Xtreme technology could also be used to support distributed autorouting where each autorouter has its own CPU and memory space and posts routing updates to the server.

UK firm Radstone Technology, a developer of rugged, high performance COTS embed computer products for dense and aerospace industry, has tested the software on a high-speed VME-bus board that was behind schedule. Two designers worked on the 16-layer board, which featured over 7,000 nets and 12,500 vias. Ian McCormick, CAD manager at Radstone, said "XtremePCB allowed us to have two designers working simultaneously on the design of a complex board and reduce our layout cycle time by 40 to 50 per cen."

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-- Jack Horgan, EDACafe.com Contributing Editor.

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