August 22, 2005
Power Reduction wth Golden Gate Technology
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Jack Horgan - Contributing Editor

by Jack Horgan - Contributing Editor
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Gold Gate Technology is a small venture backed startup offering power reduction products and services for IC designers. Last May they introduced two new software products -- Power Optimize Gold and Power Plan Gold. On August 11th they announced the appointment of William Ruby as VP of Marketing. I had an opportunity to interview him shortly thereafter.

Tell me a little about your background.

I started out as an IC designer. Actually one of the very first jobs I had at Intel was as part of the first Pentium design team. I designed the Pentium cache memory. I spent quite a few years at Intel. I then took a medical position at Siemens which was doing pacemakers. I was interested in low power even back then. I thought it would be an opportunity to learn about low power design. I worked at Siemens for about four years. I also went to business school at the same time. I thought that EDA would be an interesting place to work since I had used design automation tools as a designer. I thought that working in the field seem the thing to do. When I was at Siemens I used the EPIC tool called Power Mill, one of the first power analysis tools. Quite a few people at EPIC were aware of that, gave me a call and brought me on board. I was responsible on the marketing side for their power analysis and power characterization products. A few months after I joined EPIC it became part of Synopsys. I was at Synopsys for four years. I left and took a detour to a little startup that I was attracted to. Eventually I wound up at a place called Sequence Design. Sequence in my opinion was not really focused on a particular strategy. They tired to do a lot of different things. They are still around but nobody is really sure there they are going. I wanted to get back to a
larger place, basically a safer place to be than Sequence. I went to Cadence for a year and a half. I didn't have much to do with power at Cadence. I was running Cadence Virtuoso physical design product.

Golden Gate was a company that Sequence was trying to do a partnership with and I was engaged in that effort. They originally started out doing a full blown place and route technology and later the company focused on power reduction specifically and that's where my background fits very well. I was brought on board. I'm responsible for Marketing and actually application engineering as well; custom support pre-sales and post sales.

What attracted you to Golden Gate?

Two things. Number one is the real laser sharp focus of the company, specifically in the area of power reduction. There are a lot of capabilities out there that perform power analysis and power information. They tell you how much power your design is using but they don't do very much about fixing the problem. Golden Gate is specifically addressing the issue of reducing power consumption automatically and working together with existing design flows. To me that's a very good value proposition, a defensible market position. I think that with this kind of approach Golden Gate will be successful. It's a small company atmosphere. It is more of an entrepreneurial spirit and team. On the
front line being able to make a direct contribution to the company's success.

The focus on power reduction as well as the small company atmosphere, that's what attracted me.

In your role as head of Marketing what is the main challenge?

I think one of the biggest challenges of marketing for a small company is rising above the noise level. There are a lot of small companies out there and obviously the larger vendors. But from a marketing perspective, honing the message and coming up with the positioning of the product with unique technology to really provide value to the customers out there; focusing on that value; showcasing that value; and really just differentiating the company and its technology from everyone else. This is the real challenge on the marketing side. I'm spending a lot of time right now on the product roadmap and product specification, benchmark results trying to get a handle on the unique technology
that Golden Gate has and getting the value which is power reduction quantified and show to the customer.

Why is power reduction so important?

There are at least three reasons why power reduction is important. One good reason is that that everything is going wireless, everything is going portable these days, everything runs on batteries. The longer the battery lasts, the more competitive the product is, the better consumers like it and the more visible a particular end product is from our end customer. Cellphones, PDAs, wireless game systems like the Sony PSP, anything that runs on batteries. For them power reduction is absolutely critical because of the longer battery life requirement. There is never enough talk time on cellphones, never enough play time on a gaming system. Battery life is absolutely critical.

The second reason is cost. It turns out that the price of a package even the type of package that a semiconductor chip is put on and therefore the cost of the package is a direct function of its power consumption. The more power a chip consumes the more expensive is the package required to dissipate that heat. In some cases you need a heat sink or a fan to dissipate the extra heat. If a design team can reduce the power consumption of a design they can potentially reduce the packaging costs and therefore improve the profit margin. Power is becoming a limiting factor in some cases, limiting the sheer functionality of the design. I've heard Intel say in public that in the past they did
high performance design but nowadays they do power constrained high performance design. This means in the past it was all about clock speed and how fast you could go while nowadays it is how fast you can go under a particular power budget. This is a very interesting area where power reduction can potentially lead to higher functionality and higher clock speed.

The third reason is sheer reliability. We talked about packaging costs. What happens is that you consume too much power for the package you have designed the chip for. I've seen a processor chip putting out the system and begin to smoke at the same time. Short term and long term reliability is a direct function of heat and therefore power consumption. Reducing power will improve the reliability of the device. A typical failure of a part in a system, particularly one in the hands of the customer in the field, can be enormously expensive to correct. It's better to catch these problems early. Make sure the design is done properly and avoid the chip blowing up.

Pat Gelsinger now Intel CTO said in an article “Chipmakers Face Power Struggles” in the San Francisco Chronicle said that “Business as usual is not an option” What he meant is that you can't ignore power consumption in your design, you have to actively find ways of reducing it in your design flow. You must deal with it every step of the way.

What do you see as the mission of Golden Gate?

Our mission is to be the gold standard for power reduction. It really means we want to build up the franchise of the company by looking at all aspects and all elements of power consumption focused on reducing all of these components and all these elements of power including dynamic and switching power, heat power and leakage power. Looking at how power is distributed on the chip. Looking at ways to optimize and reduce power consumption.

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-- Jack Horgan, Contributing Editor.


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