HiSilicon Boosts Productivity Deploying Advanced Cadence Simulator

SAN JOSE, CA -- (MARKET WIRE) -- Jul 18, 2011 -- Cadence Design Systems, Inc. (NASDAQ: CDNS), a leader in global electronic design innovation, today announced that China's HiSilicon Technologies Co., Ltd. achieved dramatic results in its verification flow using the Cadence® Virtuoso® Accelerated Parallel Simulator. HiSilicon uses the award-winning simulator to verify its complex ASICs. Used by the world's leading analog design teams, the Accelerated Parallel Simulator can dramatically speed design cycles while delivering more complete simulation coverage to guard against bugs.

"We recognized the need to conduct faster and more thorough verification of our advanced designs, such as PLLs and ADCs," said XiaoWei Wang, director of HiSilicon's Analog Design Department. "Compared to baseline results from the Cadence Spectre® Circuit Simulator, the Accelerated Parallel Simulator has provided from three to 24 times speed-up on various circuits with different CPU configurations, greatly enhancing our simulation capability for large post-layout verification. In general, the Accelerated Parallel Simulator has improved the efficiency of our design verification flow up to 40 percent, exceeding our expectations. Its seamless integration into the Virtuoso IC 6.1 unified custom/analog flow has allowed our engineers to cut the design cycle while increasing simulation coverage."

Headquartered in Shenzhen, HiSilicon provides ASICs and solutions for communications networks and digital media. These ASICs are widely used in over 100 countries and regions around the world. HiSilicon has design divisions located in Beijing, Shanghai, Silicon Valley (USA) and Sweden.

"The Cadence Virtuoso Accelerated Parallel Simulator delivers next-generation SPICE-accurate simulation that enables design teams to speed the validation process while increasing their confidence they will achieve first-pass silicon success," said David Desharnais, group director, product marketing, Silicon Realization at Cadence. "By deploying the product within the framework of the Virtuoso flow, design teams like HiSilicon's get a custom/analog flow from front-end design to verification that lets them move forward efficiently without risking quality."

The Virtuoso Accelerated Parallel Simulator supports the EDA360 vision by helping ensure design intent is maintained through broad foundry support, model and circuit qualification. Unified design intent is integral to successful and efficient Silicon Realization, one of the key tenets of EDA360.

About Cadence

Cadence enables global electronic design innovation and plays an essential role in the creation of today's integrated circuits and electronics. Customers use Cadence software, hardware, IP, and services to design and verify advanced semiconductors, consumer electronics, networking and telecommunications equipment, and computer systems. The company is headquartered in San Jose, Calif., with sales offices, design centers, and research facilities around the world to serve the global electronics industry. More information about the company, its products, and services is available at www.cadence.com.

Cadence, Spectre, Virtuoso and the Cadence logo are registered trademarks of Cadence Design Systems, Inc. in the United States and other countries. All other trademarks are the property of their respective owners.

Add to Digg Bookmark with del.icio.us Add to Newsvine

For more information, please contact:
Dean Solov
Cadence Design Systems, Inc.
408-944-7226

Email Contact 





Review Article Be the first to review this article
Downstream : Solutuions for Post processing PCB Designs

Synopsys: Custom Compiler

Featured Video
Editorial
Peggy AycinenaWhat Would Joe Do?
by Peggy Aycinena
Diversity: Really, who cares
More Editorial  
Jobs
Senior R&D Engineer...Timing Closure Specialist for EDA Careers at San Jose or Anywhere, CA
Senior Front-End RTL Design AE for EDA Careers at San Jose, CA
DDR 3-4-5 Developer with VIP for EDA Careers at San Jose, CA
Senior Methodology Automation Engineer for EDA Careers at San Jose, CA
Proposal Support Coordinator for Keystone Aerial Surveys at Philadelphia, PA
Upcoming Events
11th International Conference on Verification and Evaluation of Computer and Communication Systems at 1455 DeMaisonneuve W. EV05.139 Montreal Quebec Canada - Aug 24 - 25, 2017
The Rise of Mechatronics at Dassault Systèmes San Diego 5005 Wateridge Vista Drive San Diego CA - Sep 12, 2017
The Rise of Mechatronics at Buca di Beppo - Pasadena 80 West Green Street Pasadena CA - Sep 13, 2017
S2C: FPGA Base prototyping- Download white paper



Internet Business Systems © 2017 Internet Business Systems, Inc.
25 North 14th Steet, Suite 710, San Jose, CA 95112
+1 (408)-337-6870 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy Policy