Cadence Accelerates Development of Multiprocessor Mobile Devices With New ARM ACE Verification IP

SAN DIEGO, CA -- (MARKET WIRE) -- Jun 06, 2011 -- Come See Us at the Cadence DAC Booth #2237 -- Cadence Design Systems, Inc. (NASDAQ: CDNS), a leader in global electronic design innovation, today announced the immediate availability of verification IP (VIP) for ARM Ltd.'s new AMBA 4 Coherency Extensions protocol (ACE), extending its popular VIP catalog and speeding the development of multiprocessor mobile devices. The new VIP enables designers to verify the functionality of multiprocessor ARM Cortex®-A15 designs now being deployed in a variety of mobile applications including consumer tablets and smart phones. These multiprocessor designs must rely on cache coherency to effectively execute multiple tasks simultaneously, a requirement in order to run more powerful software "apps" with fast response times. The ACE protocol provides hardware-based cache coherency and is used in conjunction with ARM Cortex-A15-based multiprocessor designs. When using the ACE VIP in tandem with Cadence® end-to-end interconnect fabric monitoring, designers have the first full solution for coherency verification.

"Mobile design complexity has grown to the point that it requires capabilities previously only found in very high-performance systems," said Michael Dimelow, Director of Marketing, Processor Division, ARM. "The ACE protocol provides the cache coherency required to manage the rising number of transactions between multiple processors and distributed memory. This is true for all classes of consumer devices and, increasingly, in the network and enterprise markets. ARM has worked closely with EDA partners, such as Cadence, to ensure that their latest VIP tools are capable of validating these complex coherent compute systems."

The AMBA 4 ACE VIP is the newest member of the Cadence VIP catalog, which is comprised of a broad portfolio of protocol verification IP and memory models. VIP enables designers to verify the functionality of their systems at the silicon, SoC and system levels, delivering the technology required to achieve the Cadence EDA360 vision.

"By working collaboratively with ARM and their leading Cortex-A15 customers over the last year, we deliver must-have VIP for verifying systems based on the ACE protocol," said Ziv Binyamini, Corporate Vice President of System & Software Solutions, Research and Development at Cadence. "This VIP is critically needed to speed the development and delivery of sophisticated ARM-based mobile devices and overcome the growing challenges inherent in designing cache-coherent, multiprocessor systems."

For over ten years, on more than 1600 designs, the advanced methodology used by Cadence VIP has helped to measurably verify that AMBA designs will meet the specification. Now, with the complex use scenarios introduced with cache coherency and multiprocessor designs, Cadence's advanced VIP is even more critical to complete design verification. Cadence VIP verifies each master and slave to ensure compliance with the ACE specification, and works with an interconnect fabric monitor to ensure coherency of the full SoC, giving designers confidence that their designs are truly coherent. Only Cadence delivers this complete ACE verification solution.

The Cadence ACE verification solution is available now as part of the broad VIP catalog. For additional information visit the AMBA VIP web page, visit with Cadence in booth 2237 at the Design Automation Conference (DAC) in San Diego, or attend the ARM, Cadence and Texas Instruments Exhibitor Forum on June 7, 2011 at DAC.

About Cadence

Cadence enables global electronic design innovation and plays an essential role in the creation of today's integrated circuits and electronics. Customers use Cadence software, hardware, IP, and services to design and verify advanced semiconductors, consumer electronics, networking and telecommunications equipment, and computer systems. The company is headquartered in San Jose, Calif., with sales offices, design centers, and research facilities around the world to serve the global electronics industry. More information about the company, its products, and services is available at

Cadence and the Cadence logo are registered trademarks of Cadence Design Systems, Inc. in the United States and other countries. AMBA, ARM and Cortex are registered trademarks of ARM Ltd or its subsidiaries. All other trademarks are the property of their respective owners.

Add to Digg Bookmark with Add to Newsvine

For more information, please contact:
Dean Solov
Cadence Design Systems, Inc.

Email Contact 

Review Article Be the first to review this article


Featured Video
Peggy AycinenaWhat Would Joe Do?
by Peggy Aycinena
Acquiring Mentor: Four Good Ideas, One Great
More Editorial  
SENIOR ASIC Design Engineer for TiBit Communications at Petaluma, CA
Manager, Field Applications Engineering for Real Intent at Sunnyvale, CA
Sr. staff ASIC Design Engineer -2433 for Microchip at San Jose, CA
Upcoming Events
DeviceWerx - 2016 at Green Valley Ranch Casino & Resort Las Vegas NV - Nov 3 - 4, 2016
2016 International Conference On Computer Aided Design at Doubletree Hotel Austin TX - Nov 7 - 10, 2016
ICCAD 2016, Nov 7-10, 2016 at Doubletree Hotel in Austin, TX at Doubletree Hotel Austin TX - Nov 7 - 10, 2016
Electric&Hybrid Aerospace Technology Symposium 2016 at Conference Centre East. Koelnmesse (East Entrance) Messeplatz 1 Cologne Germany - Nov 9 - 10, 2016
S2C: FPGA Base prototyping- Download white paper

Internet Business Systems © 2016 Internet Business Systems, Inc.
595 Millich Dr., Suite 216, Campbell, CA 95008
+1 (408)-337-6870 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy Policy