Asygn S.A.S, a French startup developing verification solutions for large analog systems, announces the release of Tactyle-Matrix, an analog simulator that makes a complete, detailed analysis of large repetitive structures, such as image sensor arrays and memories, a practical proposition.

This announcement follows a joint press release with SOFRADIR, a leading developer and manufacturer of advanced infrared detectors for military, space and commercial applications, in April.  The latter release concerned a specific project, and was based on the same core technology as the new Tactyle-Matrix product.  This product will make the technology accessible to a wider industrial audience.

Figure 1. Tactyle-Matrix with principle inputs

Tactyle-Matrix addresses an important shortcoming in verification flows for imaging systems.  Such systems contain not only large arrays of light detecting cells (1 to 10 million pixels is common), but also a battery of addressing logic and sensitive analog circuitry for controlling the capture and readout of the image. 

In the past, full simulations of imaging systems have therefore been impractical and this has always been a weak point of verification flows.  Designers had to break the system up into smaller sections, then simulate them separately, making it very hard to trap certain types of signal integrity problems.  

For example, the effect of pixel leakage on image quality may only be directly assessed if a full image capture sequence is simulated.  Likewise for the impact of amplifier slew rate and bandwidth limitations on inter-row and inter-column interference.  Somewhat less subtle, but equally important: verification of the correct connection and functionality of the combined analog/digital/optical system requires a flow based on the netlist that corresponds to the final layout.

Asygn’s product solution to these issues combines:

• A high performance, system level analog simulation engine
• New algorithms for the efficient treatment of repeated components
• GUI-based post-processing of samples from different stages in the image processing path

The system provides, for the first time, a complete functional verification of an imaging device.  A 1 Megapixel device may be simulated in less than 15 minutes on a single CPU.  Further, analyses can be made with respect to images, rather than thousands of electrical signals.

Models must be constructed to give the required accuracy at the system level and, with the appropriate methodology, non-ideal circuit behavior may be analyzed with extremely high precision.  When comparing with an approach based on SPICE type simulators, where system level effects must be extrapolated from the simulation of extremely small matrices, it is seen that the Tactyle-Matrix approach wins not only on speed but also on accuracy grounds.

“This is just the beginning”, predicts Daniel Saias, Asygn’s CEO.  “We have yet to exploit the obvious parallelism in this type of simulation, and there are many important imaging effects that we have barely started to explore.  Using Tactyle-Matrix, companies will be able to setup genuine verification flows, complete with systematic regression tests.  This is a great step forward.”

About Asygn

Asygn is a Grenoble-based startup, specializing in the verification of analog/mixed-signal and RF systems.  The company delivers application-focused solutions in order to deal with tough issues that traditional, generic approaches cannot handle.  Asygn's solutions incorporate their own analog system level simulators, which provide major performance advantages.  The company has had notable successes in the following applications: imaging arrays; mobile phone radios; MEMs and NEMs sensors; digital and fractional PLLs; high speed IOs.  For more information go to www.Asygn.com or Email Contact.