VeriSilicon and Legend Design Enable Instance-based Memory Characterization for Compiler Users

SUNNYVALE, Calif. and SANTA CLARA, Calif., -- October 7, 2003 -- VeriSilicon, Inc., a leading provider of SoC Intellectual Property and Legend Design Technology, Inc., a leader in memory IP characterization and simulation software, today announced support for instance based characterization of Verisilicon embedded memory. Based upon layout-extracted circuit data with resistors and capacitors, Legend's CharFlo-Memory! toolset has the capacity to accurately and efficiently generate on-chip memory instance models at any PVT (process, voltage and temperature) corner.

"For the times when an SoC design requires the most accurate simulation models possible, VeriSilicon memory compiler users can count on Legend's instance based characterization tool, CharFlo-Memory!, to quickly produce models that are close to the reality of the silicon. VeriSilicon is dedicated to providing our clients with quality IP by partnering with Legend and the means to achieve first silicon success. Legend's instance based characterization tools enable our users to incorporate Verisilicon memory IP in high-performance and low-power designs" said Wayne Dai, President and Chief Executive Officer of VeriSilicon, Inc.

In addition to standard cell libraries and I/O cell libraries, VeriSilicon offers memory compiler products including single- and dual-port SRAM compiler, single- and two-port register file compiler, and diffusion programmable ROM compiler. In particular, VeriSilicon provides memory compilers for Semiconductor Manufacturing International (Shanghai) Corporation (SMIC) 0.18 um and 0.15 um technologies and achieved first silicon success on several multi-million gate SoC designs, including 32 bit microprocessors, 16 bit DSPs, and high performance ASICs.

"Due to second order effects such as coupling and leakage power inherent to deep sub-micron designs, instance modeling of embedded memories is required for an accurate pre-tapeout system simulation" said You-Pang Wei, President and Chief Executive Officer of Legend Design Technology, Inc. "Users of Verisilicon memory compilers now have a reliable and cost-effective turnkey solution for maximizing their design's performance and yield in silicon".

About Legend Design Technology, Inc.
Legend Design Technology, Inc. is a leading provider of characterization and simulation software for semiconductor Intellectual Property (IP) blocks in SoC designs. With an emphasis on productivity and value, Legend's CharFlo-Memory! toolset which includes MSL, SpiceCut, MemChar and MSIM, revolutionize the time consuming and error prone processes associated with characterization. SpiceCut can automatically build critical-path circuits to reduce simulation time for characterization, especially from post-layout extracted circuits with resistors and capacitors. MemChar can automatically characterize the memories and generate the 'true' timing and power models. MSL can automate memory characterization with customized setup of '.Lib-in and .Lib out'. MSIM is a characterization-oriented circuit simulator with post-layout RC reduction capability. With high accuracy, high speed and licensing models, MSIM can provide excellent price-performance. For more information, visit www.LegendDesign.com

About VeriSilicon
Founded in 2001, VeriSilicon Holding is a Cayman Islands Company. It has subsidiary in US, VeriSilicon, Inc., as well as subsidiaries in Shanghai, China, and Taipei, Taiwan. Its mission is to become a leading ASIC Design Foundry, providing design services and turn-key services including design, manufacturing, packaging, testing, and delivery. To establish the infrastructure for ASIC design foundry, VeriSilicon offers Standard Design Platforms including standard cell libraries, I/O cell libraries, and memory compilers, optimized specifically for emerging semiconductor wafer foundries. Currently VeriSilicon provides the Standard Design Platforms for Semiconductor Manufacturing International (Shanghai) Corporation (SMIC), Grace Semiconductor Manufacturing Corporation (GSMC), Advanced Semiconductor Manufacturing Corporation of Shanghai (ASMC), and Shanghai Hua Hong NEC Electronics Co., Ltd. (HHNEC), covering 0.15 um, 0.18 um, 0.25 um, 0.35 um, and 0.6 um process technologies. For more information, please visit VeriSilicon's website at www.verisilicon.com.


###



Review Article Be the first to review this article

Aldec Simulator Evaluate Now

Featured Video
Editorial
Peggy AycinenaIP Showcase
by Peggy Aycinena
Sonics: Leading the industry by example
More Editorial  
Jobs
DSP Tools Engineer for Cirrus Logic, Inc. at Austin, TX
RF IC Design Engineering Manager for Intel at Santa Clara, CA
Senior PIC Test Development Engineer for Infinera Corp at Sunnyvale, CA
ASIC Design Engineer for Infinera Corp at Sunnyvale, CA
REVISED***Director Product Line RF/IC for EDA Careers at San Jose, CA
Upcoming Events
IC Open Innovation Panel During REUSE 2017 at Santa Clara Convention Center 5001 Great America Parkway Santa Clara CA - Dec 14, 2017
Essentials of Electronic Technology: A Crash Course at Columbia MD - Jan 16 - 18, 2018
Essentials of Digital Technology at MD - Feb 13 - 14, 2018
CST: Webinar series



Internet Business Systems © 2017 Internet Business Systems, Inc.
25 North 14th Steet, Suite 710, San Jose, CA 95112
+1 (408) 882-6554 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise