Thursday, February 17, 2011
Time: 2:00 pm – 3:00 pm EST (11:00 am – 12:00 pm PST)
Abstract: Aldec adds new and innovative debugging technologies to HES platform for Simulation Acceleration, providing verification engineers capabilities to quickly verify RTL designs with longer test cases and obtain faster results.
Learn in this webinar Aldec’s new debugging technologies including Mirror-Box ideal for quick smoke-tests runs where you can modify your HDL code and run simulation in the FPGA hardware without rerunning Synthesis and P&R. Obtain simulation speed up factor of 10-100X with accelerated debugging to detect more errors and bugs per day, ultimately helping you meet tight time-to-market deadlines.
To register, visit www.aldec.com/Events