Jasper Announcing Newest Formal Verification Technology at EDSFair, Yokohama, Jan. 27-28 -- Booth 002

MOUNTAIN VIEW, CA -- (MARKET WIRE) -- Jan 12, 2011 --


WHAT: Jasper Design Automation and its Japanese distributor CyberTec will display Jasper's latest formal verification technology innovations at this month's EDSFair. For more information on EDSFair: http://www.edsfair.com/e/.

WHEN: EDSFair takes place Jan. 27-28, 2011

WHERE: EDSFair is held at Pacifico Yokohama Exhibition Hall, Yokohama, Japan. Jasper and CyberTec will be in Booth 002.

WHO: For additional details, or to arrange a product demo, contact CyberTec at Email Contact, or visit their website http://www.cyber-tec.co.jp.

About Jasper Design Automation
Jasper delivers industry-leading EDA software solutions for semiconductor design, verification, and reuse, based on the state-of-the-art formal technology. Customers include worldwide leaders in wireless, consumer, computing, and networking electronics, with over 150 successful chip deployments. Jasper, headquartered in Mountain View, California, is privately held, with offices and distributors in North America, South America, Europe, and Asia. Visit www.jasper-da.com to reduce risks; increase design, verification and reuse productivity; and accelerate time to market.

Jasper Design Automation and the Jasper Design Automation logo are trademarks or registered trademarks of Jasper Design Automation, Inc. All other trademarks mentioned are the property of their respective companies.

Contact:
Jim Lochmiller
lochpr
For Jasper Design Automation
(541) 292-0959

Email Contact 





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