Azuro Joins Cadence Connections Program

Companies Agree to Collaborate for Azuro to Deliver Integrated CPF-Based Design Flow

SANTA CLARA, Calif. — (BUSINESS WIRE) — March 3, 2010 — Azuro, Inc., a leading provider of advanced clock tree synthesis and timing optimization tools for digital chip design, today announced that Azuro has become a member of the Cadence Design Systems Connections® program. Azuro has also been a long standing member of the Power Forward Initiative and is developing interoperability software that takes advantage of the Common Power Format (CPF) to link Azuro’s PowerCentric™ clock tree synthesis to CPF-enabled low power design flows.

“PowerCentric is used within Cadence-based design flows at some of the world’s biggest chip companies,” said Paul Cunningham, CEO and co-founder of Azuro. “CPF is gaining significant traction within our user base and we applaud Cadence’s leading role in making CPF such a practical success.”

Azuro plans to ship support for CPF in PowerCentric in Q2 this year.

“We are committed to collaborating with the ecosystem in support of our customers,” said Pankaj Mayor, group director of business development at Cadence. “We’re pleased to see Azuro actively participating in both the Cadence Connections program and the Power Forward Initiative.”

About PowerCentric

PowerCentric is a clock tree synthesis tool for digital standard cell based chip designs. It reduces chip power by up to 20% and dramatically increases designer productivity on designs with complex clock networks.

About Azuro

Azuro is an electronic design automation company supplying software tools for use in designing digital semiconductor chips. The company's unique clock tree synthesis and timing optimization technologies make chips faster, reduce chip power and dramatically accelerate chip time to market. Founded in 2002, the company is headquartered in Santa Clara, CA with R&D in Cambridge, UK, and is privately held. For additional information, visit http://www.azuro.com/



Contact:

Cayenne Communication LLC
Linda Marchant, 919-451-0776
Email Contact




Review Article Be the first to review this article
CST: Webinar November 9, 2017

Aldec

Featured Video
Editorial
Peggy AycinenaWhat Would Joe Do?
by Peggy Aycinena
DVCon Europe 2017: Munich and So much more
More Editorial  
Jobs
Technical Support Engineer EU/Germany/UK for EDA Careers at N/A, United Kingdom
Senior R&D Engineer...Timing Closure Specialist for EDA Careers at San Jose or Anywhere, CA
Senior Front-End RTL Design AE for EDA Careers at San Jose, CA
Upcoming Events
25th IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC 2017) at Yas Viceroy Abu Dhabi Yas Marina Circuit, Yas Island Abu Dhabi United Arab Emirates - Oct 23 - 25, 2017
ARM TechCon 2017 at Santa Clara Convention Center Santa Clara CA - Oct 24 - 26, 2017
MIPI DevCon Bangalore 2017 at The Leela Palace Bengaluru India - Oct 27, 2017
MIPI DevCon Hsinchu City 2017 at Sheraton Hsinchu Hotel Taiwan - Oct 31, 2017
CST: Webinar series



Internet Business Systems © 2017 Internet Business Systems, Inc.
25 North 14th Steet, Suite 710, San Jose, CA 95112
+1 (408) 882-6554 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise