Cadence Introduces the EDA Industry's First Verification Solution for PCI Express 3.0

SAN JOSE, CA -- (MARKET WIRE) -- Oct 01, 2009 -- Cadence Design Systems, Inc. (NASDAQ: CDNS), the leader in global electronic design innovation, today announced it has developed Open Verification Methodology (OVM)-based verification IP (VIP) to assist developers working with the emerging PCI Express Base Specification 3.0 (PCIe 3.0) interconnect protocol, which is currently under development within the PCI-SIG at a preliminary revision 0.5. The new Cadence Incisive® VIP features the Cadence Compliance Management System, a metric-driven verification solution that uniquely automates protocol compliance verification and can help early PCIe 3.0 adopters meet quality and time-to-market goals.

"The PCI-SIG PCIe 3.0 specification doubles the interconnect performance bandwidth of the ubiquitous and general-purpose PCI Express I/O standard," said Al Yanes, PCI-SIG president and chairman. "Cadence's continued support will expedite the industry adoption of this new technology."

"The delivery of this new verification IP underscores Cadence's commitment to providing valuable verification assistance to developers working with emerging protocols," said Michal Siwinski, group director of Front End Marketing at Cadence. "As one of the most advanced offerings in our VIP catalog, the PCIe 3.0 module provides advanced verification technology for developers working with the latest protocols, shortening development time, increasing team productivity, and reducing overall project costs."

The Cadence Incisive Verification IP Portfolio supports more than 30 industry standards and has been available since Q3 2008. The new VIP for PCIe 3.0 is available now for early adoptors, and is expected to be released in Q1 2010.

About Cadence

Cadence enables global electronic design innovation and plays an essential role in the creation of today's integrated circuits and electronics. Customers use Cadence software and hardware, methodologies, and services to design and verify advanced semiconductors, consumer electronics, networking and telecommunications equipment, and computer systems. The company is headquartered in San Jose, Calif., with sales offices, design centers, and research facilities around the world to serve the global electronics industry. More information about the company, its products, and services is available at

Cadence and the Cadence logo are registered trademarks of Cadence Design Systems, Inc. in the United States and other countries. All other trademarks are the property of their respective owners.

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Dean Solov
Cadence Design Systems

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