Berkeley Design Automation to Present RF Simulation Paper at the 2009 Design Automation Conference

SANTA CLARA, Calif. — (BUSINESS WIRE) — July 20, 2009 Berkeley Design Automation Inc., provider of the Analog FastSPICE™ (AFS) unified circuit verification platform for advanced analog, mixed-signal, and RF (AMS/RF) integrated circuits, today announced that the company will be presenting a RF circuit simulation paper at the technical session and exhibiting at the Design Automation Conference (DAC) 2009. The paper has been nominated for Best Paper at the upcoming show.

WHO:       Berkeley Design Automation, Inc.
 
WHAT: Technical Session 23 - Paper 23.2 - A Robust and Efficient Harmonic Balance (HB) Using Direct Solution of HB Jacobian, by Amit Mehrotra and Abhishek Somani.
 
Exhibit: Berkeley Design Automation will highlight how its AFS Platform enables AMS/RF design teams to verify what would otherwise require numerous simulators, achieve 2x higher verification efficiency, and signoff with the industry's only true SPICE accurate device noise analysis.
 
WHERE: Design Automation Conference 2009, Moscone Center, San Francisco, CA.

July 27 – 31, 2009. Berkeley Design Automation will be exhibiting at booth #1620 (South Hall).

 
WHEN: Paper to be presented on Wed. July 29, 9:00am, Room 125.

For more information, see http://www.dac.com.


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