eInfochips Announces DDR2 SDRAM SystemVerilog Memory Model Generator Tool

GUI-Based Tool Reduces Verification Time and Maximizes Memory Coverage

SUNNYVALE, California and AHMEDABAD, India, June 4 /PRNewswire/ -- eInfochips, Inc., a leading design services company today announced the availability of a DDR2 SDRAM SystemVerilog Memory Model Generator. This HVL-based tool is an integrated solution to generate behavioral models for all leading memory vendors, such as Micron(R), Samsung(R), Hynix(R) & Elpida(R), thereby shortening verification time & maximizing memory coverage.

"eInfochips strives to market solutions that add value to the design process," states Sribash Dey, VP, North America Sales at eInfochips. "By offering high-quality simulation models and verification environments, we believe the DDR2 SDRAM memory model generator tool will reduce overall verification time and reduce development cost."

With eInfochips' DDR2 SDRAM model generator, it is possible to configure parameters of DDR2 SDRAM memory such as memory size, data width, clock rate, cycle time, CAS latency and data rate.

Key Features of Memory Generator Tool

The DDR2 SDRAM memory generator is a TCL/TK-based tool that supports leading memory vendors and preserves a large library of part numbers for each supported memory vendor. The tool can be operated in 2 modes - Typical Mode or Custom Mode. In the Typical Mode, a user may choose vendors and part numbers to generate the memory model. In the Custom Mode, a user may create a customized behavioral model from scratch by configuring the parameters of DDR2 SDRAM through the configuration selection algorithm (CSA).

Key Features of Generated Behavioral Models

The behavioral models are compliant to JEDEC standard JESD79 - 2D and ready to be plugged into a verification environment. The models offer built-in coverage and can be configured to turn on/off initialization, enable/disable DDR2 interface checkers and coverage.

Deliverables

Deliverables include verified SystemVerilog DDR2 SDRAM generator encrypted code, a user guide and release notes.

For more information on this IP please visit: http://www.einfochips.com/services/asic/IP/ddr2-sdram-memorygenerator-systemv erilog.php

(Due to the length of this URL, it may be necessary to copy and paste this hyperlink into your Internet browser's URL address field. Remove the space if one exists.)

Support & Availability

DDR2 SDRAM SystemVerilog memory generator tool is now available and comes with support. For pricing details write to us at Email Contact Currently the tool supports DDR2 but is expandable to support DDR, DDR3, NAND Flash, NOR Flash, QDR, XDR.

About eInfochips

eInfochips is a leading IP driven design services company with the range of services & solutions in ASIC/Chip/SoC, Embedded System and Software. eInfochips' Chip/ASIC group has capabilities spanning from ASIC/Chip design, verification, physical design, FPGA design & prototyping and IP Cores development and integration. eInfochips has contributed to over 130+ designs in automotive, consumer, semiconductor, avionics, networking/communication, video and security/surveillance industries through its wide array of RTL to GDS II services and solutions. For more information, visit http://www.einfochips.com

Micron(R), Samsung(R), Hynix(R) & Elpida(R) are trademarks of Micron Technology, Samsung, Hynix Semiconductor Inc. and Elpida Memory Inc respectively. Other names and brands may be claimed as the property of others.

Press Contacts:

Nirav Shah, Email Contact Tel : +91-99099-22260




Review Article Be the first to review this article
Featured Video
Editorial
Peggy AycinenaWhat Would Joe Do?
by Peggy Aycinena
Job Openings: Can EDA Predict the Future
More Editorial  
Jobs
Engr, Elec Des 2 for KLA-Tencor at Milpitas, CA
ASIC Design Engineer 2 for Ambarella at Santa Clara, CA
Timing Design Engineer(Job Number: 17001757) for Global Foundaries at Santa Clara, CA
Technical Support Engineer for EDA Careers at Freemont, CA
Senior FPGA Designer for Fidus Electronic Product Development at Fremont, CA
Upcoming Events
CDNLive Silicon Valley 2017 at Santa Clara Convention Center Santa Clara CA - Apr 11 - 12, 2017
10th Anniversary of Cyber-Physical Systems Week at Pittsburgh, PA, USA PA - Apr 18 - 21, 2017
DVCon 2017 China, April 19, 2017, Parkyard Hotel Shanghai, China at Parkyard Hotel Shanghai Shanghai China - Apr 19, 2017
Zuken Innovation World 2017 at Hilton Head Marriott Resort & Spa Hilton Head Island NC - Apr 24 - 26, 2017
S2C: FPGA Base prototyping- Download white paper



Internet Business Systems © 2017 Internet Business Systems, Inc.
595 Millich Dr., Suite 216, Campbell, CA 95008
+1 (408)-337-6870 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy Policy