Flexible Multicore Processing Unlocks Compute Potential of Today's Server Farms
MOUNTAIN VIEW, Calif., Feb. 12 /PRNewswire-FirstCall/ --Synopsys, Inc. (NASDAQ: SNPS), a world leader in software and IP for semiconductor design and manufacturing, today unveiled two key improvements to its PrimeTime(R) static timing analysis (STA) suite that deliver a dramatic boost to designer productivity. The latest release includes a flexible multicore processing technology that makes more effective use of both single-core and multicore CPUs across today's compute server farms, harnessing their compute potential. This release also introduces new runtime optimizations, allowing design engineers to run faster full timing and signal integrity (SI) analysis on their large designs early in the implementation process, thus reducing costly design closure iterations. These improvements work in concert to deliver up to 2X faster runtime and have been confirmed on a suite of leading semiconductor companies' designs ranging in size from one million to 50 million instances.
"We worked closely with Synopsys to achieve significant runtime improvements with PrimeTime over the last several releases," said Senthil Krishnasamy, director of Physical Design, AMD. "We are encouraged by the initial results of the new PrimeTime multicore feature, and look forward to deploying it to accelerate the STA analysis of our large designs by more fully utilizing the potential of Quad-Core AMD Opteron(TM) processors in our silicon design process."
In today's design environment, the typical compute server farm is comprised of a mix of legacy single-core and newer multicore CPU machines. Access to these heterogeneous resources is typically provided through job scheduling systems that help ensure the most efficient allocation based on dynamically-changing, enterprise-wide compute needs. During periods of high activity in the farm, the wait time for available multicore machines can far outweigh the runtime speed-up gained by multicore acceleration. Synopsys' multicore capability in PrimeTime 2008.12 helps provide the flexibility to utilize any idle CPU core resource, on any machine in the farm. This enables multicore acceleration without the multicore machine access time penalty, which means more timing analysis jobs completed faster and more efficiently.
"At RMI, time-to-market is mission critical for our platform of high-performance multi-core multi-threaded SoC processors," said Ramon Macias, director of physical design, RMI. "In order to achieve fast design closure on our latest multi-million instance 40-nanometer design, we need to run signal integrity analysis early in our design implementation phase to minimize ECOs during signoff. The latest runtime optimizations in PrimeTime SI combined with multicore CPU support has improved our runtimes by 1.5 to 1.8X."
Design teams targeting the latest silicon process technology nodes see a significant productivity benefit when they incorporate SI analysis early in their design implementation phase. Waiting until timing signoff to perform full-chip SI analysis can result in too many violations, introducing a major design closure bottleneck late in the design cycle. New runtime optimizations in the latest PrimeTime release are targeted specifically at making SI analysis of large designs more practical in the earlier phases of design implementation, accelerating signoff closure.
"The latest PrimeTime release demonstrates how Synopsys' R&D continues to innovate and execute on our multicore initiative," said Antun Domic, senior vice president and general manager, Implementation Group at Synopsys. "Through continuous R&D investment, we have addressed a key STA and SI analysis challenge for our customers - utilizing CPU cores across machines to accelerate runtime. Companies can now make more effective use of their existing compute server farms while having the flexibility to take advantage of the latest multicore hardware."
PrimeTime 2008.12 is available now to all current PrimeTime customers. The latest release includes quad-core licensing as a standard feature. The multicore capability works seamlessly with job scheduling systems such as LSF from Platform Computing Corporation and Grid Computing Solutions from Sun Microsystems.
Synopsys, Inc. (NASDAQ: SNPS) is the world leader in electronic design automation (EDA), supplying the global electronics market with the software, intellectual property (IP) and services used in semiconductor design and manufacturing. Synopsys' comprehensive, integrated portfolio of implementation, verification, IP, manufacturing and field-programmable gate array (FPGA) solutions helps address the key challenges designers and manufacturers face today, such as power and yield management, software-to-silicon verification and time-to-results. These technology-leading solutions help give Synopsys customers a competitive edge in bringing the best products to market quickly while reducing costs and schedule risk. Synopsys is headquartered in Mountain View, California, and has more than 60 offices located throughout North America, Europe, Japan, Asia and India. Visit Synopsys online at http:// www.synopsys.com.
Synopsys and PrimeTime are registered trademarks of Synopsys, Inc. AMD and Opteron are trademarks or registered trademarks of Advanced Micro Devices, Inc. Any other trademarks or registered trademarks mentioned in this release are the intellectual property of their respective owners.
Editorial Contact: Sheryl Gulizia Synopsys, Inc. 650-584-8635 email@example.com Lisa Gillette-Martin MCA, Inc. 650-968-8900 ext. 115 firstname.lastname@example.org
Web site: http://www.synopsys.com/