Delivers 5X throughput boost to developers of next-generation wireless systems
Turbo Codes were first deployed commercially in 3G wireless systems, primarily WCDMA/HSDPA base station applications. These function as an error correction method to ensure the optimum transfer of communications with performance levels approaching the theoretical Shannon limit (maximum information transfer rate over a noisy channel). The combination of the new Xilinx turbo coding and XtremeDSP(TM) solutions address the even greater throughput demands of 3GPP LTE systems currently in development, in order to meet the aggressive system latency reductions proposed in the new LTE standard. The cores are also designed to rapidly adapt to new and evolving requirements, such as the evolution of TD-SCDMA into the proposed TDD variant of LTE.
"With the release of the 3GPP LTE Turbo Encoder and Decoder, product developers can leverage the vast signal processing capabilities within our FPGAs to free up their system design," said Mark Quartermain, senior manager of baseband processing for the Processing Solutions Group at Xilinx. "These provide a robust communications platform which can both scale to meet different base station topologies from femto to macrocells, and be very simply updated should the Turbo parameters change as the LTE standard goes through the final ratification process."
Xilinx will demonstrate its leading-edge programmable solutions for wireless applications throughout the TD-SCDMA Evolution & LTE Summit held May 31 - June 1, at Shanghai International Conference Center in Xilinx Booth #3.
Optimized for Performance
The throughput delivered by the Xilinx 3GPP LTE Turbo Decoder LogiCORE solution exceeds the performance of competitive offerings by a factor of five. This enables developers to offload the complex, high-performance decoder function from the rest of the baseband solution, which in turn allows them to use more cost-effective DSP processors for the remaining less performance-critical baseband functions. Developers can also trade-off design size against throughput performance by simply selecting the number of processing units available to the decoder function within the Xilinx FPGA, thus ensuring that only the smallest possible device is needed to meet system performance criteria.
The Xilinx 3GPP LTE Turbo Decoder offers features that include: -- Complete Interleaver function -- Full 3GPP LTE block size range (188 block sizes, ranging from 40 - 6144) -- Dynamically selectable number of iterations 1-15 -- Multiple (2, 4, 8) processing units with intelligent scheduler function -- MAX, MAX_SCALE and MAX* (Log-MAP) algorithms -- Bit accurate C model available for fast simulation of BER performance -- Support for Spartan-3, Spartan-3A DSP, Virtex-4, and Virtex-5 FPGAs
The Encoder contains a full 3GPP LTE interleaver block and supports all 188 block sizes in the 40 - 6144 range permitted by the specification. It is based upon a double-buffered symbol memory scheme for maximum throughput performance, and offers flexible control options to simplify integration into the customer's system architecture.
Additional details about the encoder and decoder offerings available at: http://www.xilinx.com/products/ipcenter/DO-DI-TCCENC-LTE.htm and http://www.xilinx.com/products/ipcenter/DO-DI-TCCDEC-LTE.htm respectively.
Pricing and Availability
The new 3GPP LTE Turbo Encoder and Decoder LogiCORE solutions are now shipping with the latest release of the Xilinx CORE Generator(TM) software. They are priced at US$1,500 for the Turbo Encoder and US$15,000 for the Turbo Decoder.
About Xilinx XtremeDSP Solutions
Xilinx is the world's leading supplier of high-performance reconfigurable DSP solutions optimized for performance, price and power. Xilinx XtremeDSP solutions come complete with silicon platforms, design tools, development boards and kits, reference designs and a host of signal processing IP for wireless and multimedia video applications. The XtremeDSP silicon portfolio delivers maximum flexibility with three device platforms: the Virtex-4 SX platform with over 250 GMACS at 500MHz, Virtex-5 SXT platform for ultra-high bandwidth with over 350 GMACS at 550MHz and integrated low-power serial connectivity, and the Spartan-3A DSP platform with the most price-performance optimized devices offering over 30 GMACS at 250MHz. Detailed information is available at http://www.xilinx.com/dsp.
About the TD-SCDMA Forum
TD-SCDMA Forum is a non-profit international telecommunication organization, and the host of all previous International TD-SCDMA Summits. TD-SCDMA Forum aims to provide an interface platform for cooperation in TD-SCDMA and LTE among worldwide standardization organizations, operators, vendors, research institutes, investment organizations, and other relevant companies or groups. This forum is focused on the promotion and productization of TD-SCDMA and LTE technologies. Currently, the forum has more than 400 members from nearly all important sectors of the 3G industry chain, including telecom operators, such as China Mobile, domestic and overseas telecom equipment manufacturers, etc.
Xilinx is the worldwide leader in complete programmable logic solutions. For more information, visit http://www.xilinx.com.
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