Knowlent Brings Advanced Analog/Mixed-Signal Verification Environment to Users of Synopsys Discovery(TM) AMS solutions

SANTA CLARA, Calif.—(BUSINESS WIRE)—July 23, 2007— Knowlent Corporation today announced the release of the Opal TBE(TM) test bench development and simulation control environment that supports all circuit simulation technologies from Synopsys, Inc. Opal TBE will provide Synopsys users with a graphical user interface for analysis, characterization and verification of complex analog/custom blocks used in system-on-chip (SOC) designs implemented in the latest nanometer silicon technologies.

For the first time, Synopsys' analog and mixed-signal design customers have the advantage of a complete test bench development and simulation control environment launching simulations and post processing simulation results in a structured spec-driven environment. Now, joint customers can take advantage of the complete library of GoldSpec(TM) test suites for compliance testing of high speed serial interfaces such as SATA, PCIe, SAS, LVDS, XAUI and HDMI ensuring 100 percent compliance of analog blocks to their electrical specifications for that portion of an SOC design. The increased flexibility, performance and accuracy of this integration enable customers to better achieve first-time product success. In addition, Synopsys users can develop device-under-test (DUT) test benches for block-level designs such as ADCs, DACs, OpAmps and PLLs, independently making IP reuse and test bench portability a reality.

"Knowlent's support of Synopsys' family of simulators provides an advanced design environment more comprehensive than other environments in the market today," said Ed Lechner, director, product marketing analog & mixed signal for Synopsys. "Combining our leadership position in circuit simulation technology with Knowlent's state-of-the-art test bench development environment provides analog/mixed-signal design engineers the 'best in class' solution."

"Until now, Synopsys analog/mixed-signal designers used either a command-line interface or third-party tools not optimized for the level of productivity needed to ensure the complete characterization of their designs," said Nelson Seiden, Knowlent's vice president of marketing and business development. "We are extremely proud to provide this level of integration with the Synopsys analog/mixed-signal design environment delivering the accuracy, ease-of-use, and functionality designers need to achieve analog signoff and to tape-out with confidence."

About Knowlent Corporation

Located in Silicon Valley, Knowlent Corporation is an Intellectual Property (IP) and Electronic Design Automation (EDA) startup firm providing analog and mixed-signal test bench suites for standard interface specifications such as SATA, PCIe, SAS, LVDS, XAUI and HDMI. For more information and to register for a demo, please visit our website at www.knowlent.com

Synopsys, HSPICE, NanoSim, HSIM and VCS are registered trademarks of Synopsys, Inc. Discovery is a trademark of Synopsys, Inc. Any other trademarks or registered trademarks mentioned in this release are the intellectual property of their respective owners.

Knowlent and Opal are trademarks of Knowlent Corporation.

Contact:

Knowlent Corporation
Nelson Seiden, 408-748-0600
Email Contact
or
LPR
Amy Battrell, 650-363-0142
Email Contact




Review Article Be the first to review this article
Aldec

Downstream : Solutuions for Post processing PCB Designs

Featured Video
Jobs
Senior Electrical Engineer for Allen & Shariff Corporation at Pittsburgh, Pennsylvania
Upcoming Events
IEEE Women in Engineering International Leadership Conference at 150 W San Carlos St San Jose CA - May 21 - 22, 2018
SEMICON Southeast Asia 2018 at New Malaysia International Trade & Exhibition Centre (MITEC) Kuala Lumpur Malaysia - May 22 - 24, 2018
Methodics User Group Meeting at Maxim Integrated 160 Rio Robles San Jose CA - Jun 5 - 6, 2018
IEEE 5G World FOrum at 5101 Great America Parkway Santa Clara CA - Jul 9 - 11, 2018
DownStream: Solutions for Post Processing PCB Designs
Verific: SystemVerilog & VHDL Parsers
TrueCircuits: IoTPLL
DAC2018



Internet Business Systems © 2018 Internet Business Systems, Inc.
25 North 14th Steet, Suite 710, San Jose, CA 95112
+1 (408) 882-6554 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise