Accellera Approves On-Chip Test Interface and Compression Standard and Transfer to IEEE

OCI Allows Different Suppliers' Tools to Operate on Data

NAPA, Calif., October 18, 2006, - Accellera, the electronics industry organization focused on electronic design automation standards, announced today that its members and Board of Directors have approved a new test standard- the Open Compression Interface standard (OCI 1.0), and its transfer to the IEEE for standardization.

OCI standardizes the interface between different suppliers' tools to enable vendor interoperability for test pattern generation and diagnosis.

"The goal to improve design productivity with open and interoperability standards led our members and constituents to review how to improve access to test compression data," said Shrenik Mehta, chair of Accellera. "OCI is a result of these efforts and allows designers to select the best tools for their applications."

"Before on-chip scan compression, it was possible to use different EDA tool vendors for test pattern generation and diagnosis. On-chip scan compression changed that model because each tool supplier offers a different type of scan compression logic and a tool-specific way to pass information between the insertion, generation and diagnosis steps," said Bruce Cory, Technical SubCommittee chair. "OCI standardizes how data is passed from logic insertion to pattern generation and from pattern generation to diagnosis to enable designers to use different supplier tools for each step independent of the on-chip scan compression logic."

Next Steps
The next step for OCI will be an IEEE ballot for it to become an extension to the IEEE 1450.6 standard. The IEEE 1450.x family of standards is for STIL, a standard tester interface language. OCI leverages IEEE 1450.6, which is the latest extension to STIL called CTL and which allows STIL to support core-based design testing.

The OCI standard is available at

About Accellera
Accellera provides design and verification standards for quick availability and use in the electronics industry. The organization and its members cooperatively deliver much-needed EDA standards that lower the cost of designing commercial IC and EDA products. As a result of Accellera's partnership with the IEEE, Accellera standards are provided to the IEEE standards body for formalization and ongoing change control. Over the years, Accellera has developed seven standards that have been ratified by the IEEE. Accellera's recent successes in advanced design and verification language standards include SystemVerilog and PSL. For more information about Accellera, please visit

Press Contact:
Georgia Marszalek, ValleyPR for Accellera, +650 345 7477, Email Contact

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