Altera and Northwest Logic Deliver Hardware-Proven 667-Mbps DDR2 SDRAM Interface Solution

San Jose, Calif., Sept. 27, 2006 - Altera Corporation (NASDAQ:ALTR) and Northwest Logic today announced the immediate availability of a hardware-proven, 667-Mbps DDR2 SDRAM interface for Altera’s high-density Stratix® II and Stratix II GX FPGAs. This interface combines Altera’s auto-calibration DDR2 PHY and Northwest Logic’s full-featured DDR2 SDRAM Controller Core to significantly simplify DDR2 SDRAM interface design while maximizing memory throughput.

Altera’s DDR2 PHY has been optimized to provide robust performance over process, voltage and temperature variations. It is supported by a complete set of technical documentation, software and tools, intellectual property (IP) cores, demonstration boards, characterization reports and simulation models, all designed to help designers successfully interface Altera® FPGAs to DDR2 SDRAM. Customers can contact their sales representative or visit for more information.

Northwest Logic’s DDR2 SDRAM Controller Core is part of a family of high-performance, easy-to-use memory controller cores which provide support for double data rate 2 (DDR2), DDR, mobile DDR, single data rate (SDR), mobile SDR SDRAM, and reduced latency DRAM II (RLDRAM II) memories. The DDR2 SDRAM Controller Core provides high bus efficiency using request reordering, bank management and look-ahead processing. Northwest Logic also provides Error Correction Code (ECC), Read-Modify-Write and Multi-Port Front-End add-on modules to further simplify user designs. The core supports the highest memory clock rates, requires a minimal gate count and comes with complete documentation and a verification suite. For more information contact Northwest Logic or visit Customers can download Northwest Logic’s DDR2 SDRAM Controller Core from Altera’s IP MegaStore website at

“The 667-Mbps DDR2 SDRAM interface delivers significant system-level design margin for our high-end FPGAs. This interface provides a stellar solution for customers requiring high-speed DDR2 SDRAM throughput,” said David Greenfield, senior director of Altera’s high-end FPGAs.

“Altera’s and Northwest Logic’s combined DDR2 SDRAM solution hides the complexity of interfacing to high-rate DDR2 SDRAM from the designer. This enables high-performance, full-featured DDR2 SDRAM designs to be put together quickly with a minimal amount of cost and time,” said Brian Daellenbach, president of Northwest Logic.

To learn more about Altera’s Stratix II FPGAs, visit To learn more about Altera’s Stratix II GX FPGAs, visit To learn more about Northwest Logic’s memory controller cores, visit

About Northwest Logic
Northwest Logic, founded in 1995 and located in Beaverton, Oregon, provides high-performance, easy-to-use IP cores for FPGAs and ASICs. These IP cores include memory controller, PCI Express and PCI cores.

Key benefits of Northwest Logic’s IP cores include:
  • High performance – support high clock rate and high throughput
  • Easy to use – simple user interface, easy to configure, etc.
  • Fully hardware validated
  • Provided with a comprehensive verification suite
  • Support for all Altera FPGAs and migration to ASICs
  • Development boards and driver support available
  • Top quality technical support
  • Customization and integration services available
For additional information, visit

About Altera
Altera’s programmable solutions enable system and semiconductor companies to rapidly and cost-effectively innovate, differentiate and win in their markets. Find out more at


Altera, The Programmable Solutions Company, the stylized Altera logo, specific device designations and all other words that are identified as trademarks and/or service marks are, unless noted otherwise, the trademarks and service marks of Altera Corporation in the U.S. and other countries. All other product or service names are the property of their respective holder.

Editor Contact:
Kelly St. Denis Brian Daellenbach
Altera Corporation Northwest Logic
(408) 544-6397 (503) 533-5800 x 309
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