LTRIM LTR1761 LDO Voltage Regulator IP - Available for IBM 0.13um Process Technology

MONTREAL, March 21 /PRNewswire/ -- LTRIM Technologies, an innovative leader in CMOS analog virtual components and laser fine tuning technologies, today announced that its LTR1761 Low Drop Out (LDO) voltage regulator virtual component intellectual property (IP) is fully validated and available for IBM 0.13um CMOS 8RF process technology.

"For SoC designers using IBM CMOS 0.13um CMOS process technology, LTRIM's new LDO is a perfect complement," said Guy Lemieux, President and CEO, LTRIM. "LTRIM IP offerings continue to track state-of-the-art geometries to give designers optimal performance in managing SoC power."

The LTR1761 provides numerous features, including low quiescent current, high output drive, low output noise, a power-saving shutdown mode, a high power supply rejection ratio (PSRR), and a small footprint. The LTR1761 has a stable output voltage of 1.15V within the input range of 1.21 - 2.5V. The output current is 100mA maximum. The LDO provides advanced benefits for system- on-a-chip (SoC) designs; it increases circuit performance and reliability, and it reduces system costs by eliminating the need for external components.

About LTRIM

LTRIM Technologies is a provider of high-end, high-performance power management CMOS analog virtual component solutions, which can be easily integrated into CMOS mixed-signal SoCs or offered as stand-alone analog chips. In addition, LTRIM Technologies has developed and patented a new laser fine tuning technology for standard silicon diffused resistors that further enhances analog block performance. More information on LTRIM's products and services can be found at http://www.ltrim.com/ .

  Press Contact:
  Mike Shamshirian
  408-307-4562
  
Email Contact

CONTACT: Mike Shamshirian, (408) 307-4562, Email Contact




Review Article Be the first to review this article
Aldec

Featured Video
Editorial
Peggy AycinenaWhat Would Joe Do?
by Peggy Aycinena
Simon Davidmann: A re-energized Imperas Tutorial at DAC
More Editorial  
Jobs
Senior Front-End RTL Design AE for EDA Careers at San Jose, CA
LVS for PDK Design Engineer SILICON VALLEY for EDA Careers at San Jose, CA
LVS PEX DESIGN ENGINEERS SILICON VALLEY for EDA Careers at San Jose, CA
DDR 3-4-5 Developer with VIP for EDA Careers at San Jose, CA
Upcoming Events
11th International Conference on Verification and Evaluation of Computer and Communication Systems at 1455 DeMaisonneuve W. EV05.139 Montreal Quebec Canada - Aug 24 - 25, 2017
DVCon India 2017, Sept 14 - 15, 2017 at The Leela Palace Bengalore India - Sep 14 - 15, 2017
SMTA International 2017 at Rosemont IL - Sep 17 - 21, 2017
S2C: FPGA Base prototyping- Download white paper



Internet Business Systems © 2017 Internet Business Systems, Inc.
595 Millich Dr., Suite 216, Campbell, CA 95008
+1 (408)-337-6870 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy Policy