M2000 Intros Largest 90nm eFPGA; FlexEOS "Expands the Range of Applications and Products That Can Benefit From eFPGA Functionality"

PARIS—(BUSINESS WIRE)—Feb. 7, 2005— M2000 today announced immediate availability of its 90nm FlexEOS embedded FPGA macros, production proven in 90 nanometer CMOS technology and ready for volume manufacture. At 90nm, M2000's high-performance FlexEOS eFPGA macro breaks the density barrier of 1,000 reprogrammable Look-Up Tables (LUTs) per mm2, with an intrinsic technology performance capable of 2.7 GHz. It is also the industry's largest eFPGA with 98,304 LUTs, comparable to the high-end of the capacity range for commercial FPGAs.

"This achievement reinforces M2000's position as the leader in the embedded FPGA market," said In-Stat principal analyst, Jerry Worchel. "The high density of FlexEOS eFPGAs expands the range of applications and products that can benefit from eFPGA functionality.

"Field reprogrammable products are now within reach for ASIC designs, as well as platform ASICs for sizable volume production runs," Worchel continued. "eFPGAs can be used in a wide variety of common functions where they would be programmed for multiple derivatives. One example is the printer market, where one base design could be dynamically reprogrammed for many different applications."

"We are very happy about the successful achievement of such a large, complex project. It proves the viability of the technology, the software, and the integration methodology," said M2000 CEO Frederic Reblewski. "A beta customer's own design team added a complex series of system functions around the M2000 core, and integrated and validated the complete chip. Both we and the customer's design team take more than a little satisfaction from the fact that the first silicon is operational."

Reblewski also announced the company plans to open its first North American office in Silicon Valley later this month to provide sales and support for its expanding customer base.

About FlexEOS

The FlexEOS range of embedded FPGA cores are SRAM based, and can be dynamically reconfigured to change the functionality of ASIC and SoC circuits after silicon processing and packaging. FlexEOS macros are suitable for a wide range of applications, and can be supplied for any silicon foundry technology. FlexEOS macros are currently characterized and manufactured in 90 nanometer CMOS technology. The silicon density for logic functions is up to 1,350 LUTs per mm2, and the delay representing the LUT plus its interconnect portion is 0.372 ns. Each macro is delivered with a comprehensive software tool suite for the compilation of the applications which are to run on the macro.

Availability and Pricing

M2000's range of FlexEOS products has been produced for some time in 130nm technology, and are now available for production in 90nm. Evaluation versions of the software are available from M2000. The comprehensive pricing structure, which can be tailored to individual requirements, includes a license fee for each project, and royalties on production chips.

About M2000

M2000 was created in 1996 by three EDA & FPGA veterans who previously started Meta Systems (acquired by Mentor Graphics in May 1996). At Meta Systems, the three engineers developed the industry's first emulation system based on custom FPGAs (Field Programmable Gate Arrays.) The founding team has more than 17 years in FPGA architecture design, and holds numerous patents in the field of configurable logic and its applications for electronic system testing. M2000's current focus is the design and development of state of the art configurable logic technology for the rapidly growing reconfigurable SoC (System on a Chip) market. Corporate headquarters are located at: 1 Route de Gisy, Parc Burospace, Hall 1bis, Bievres, (91570) France. Website: http://www.m2000.com Email: info@m2000.fr.

Jim Lochmiller, 541-821-3438 (Public Relations)

Email Contact
Gabriele Pulini, + 33 1 69 35 32 50 (Marketing)

Email Contact


Review Article Be the first to review this article
CST: Webinar

Aldec Simulator Evaluate Now

Featured Video
Peggy AycinenaWhat Would Joe Do?
by Peggy Aycinena
The Future: EDA Hiring faces Headwinds
Peggy AycinenaIP Showcase
by Peggy Aycinena
Happy Talk: CEOs, Celebrity, Seasoning
More Editorial  
Applications Engineer for intersil at Palm Bay, FL
Acoustic Systems Test Engineer for Cirrus Logic, Inc. at Austin, TX
DSP Tools Engineer for Cirrus Logic, Inc. at Austin, TX
Design Verification Engineer for intersil at Morrisville, NC
Principal PIC Hardware Controls Engineer for Infinera Corp at Sunnyvale, CA
Upcoming Events
Essentials of Electronic Technology: A Crash Course at Columbia MD - Jan 16 - 18, 2018
Essentials of Digital Technology at MD - Feb 13 - 14, 2018
IPC APEX EXPO 2018 at San Diego Convention Center San Diego CA - Feb 24 - 1, 2018
CST: Webinar series

Internet Business Systems © 2017 Internet Business Systems, Inc.
25 North 14th Steet, Suite 710, San Jose, CA 95112
+1 (408) 882-6554 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise