HENDERSON, Nev. — (BUSINESS WIRE) — June 15, 2017 — Aldec, Inc., a pioneer in mixed-HDL language simulation and hardware-assisted verification for ASIC and FPGA designs, and Silvaco, Inc., a leading EDA provider of software tools used for process and device development and for analog/mixed-signal, power IC and memory design, have collaborated to present high-performance analog/mixed-signal(A/MS) simulation solution based on Aldecs Riviera-PRO digital simulator and Silvacos SmartSpice analog circuit simulator at Design Automation Conference (DAC) 2017 in Austin, Texas.
Riviera-PRO is Aldecs flagship for high-performance digital simulation and advanced debugging, supporting the latest Verification Libraries, including UVM, and equipped with extensive simulation optimization algorithms to achieve the highest performance in VHDL, Verilog/SystemVerilog, SystemC and mixed-language simulations. Silvacos SmartSpice is a well-known, popular high performance parallel SPICE simulator that delivers industry leading accuracy. Proven on countless designs worldwide down to 7nm FinFET, it provides both the capacity and capabilities needed for high precision analog circuit simulation.
Together, the combined solution delivers high performance and high capacity needed for todays complex SoC mixed-signal designs.
Technical presentation and demo about the A/MS solution will be delivered at Aldec Booth #421 or Silvaco Booth #1447.
- Mixed-Signal Simulation with Aldec and Silvaco - Aldec and Silvaco will proudly introduce mixed-signal co-simulation interface based on high-performance tools Riviera-PRO Advanced Verification Platform and SmartSpice Parallel SPICE Circuit Simulator. The presentation/demo will show parsing of a mixed-signal design, compilation, elaboration and mixed-signal simulation. We will show how the digital and analog domains can communicate, and how users can obtain results of Verilog-A/SPICE and Verilog-D co-simulation in Riviera-PRO user interface. Users can view the co-simulation results using Riviera-PRO Advanced Waveform Viewer and debug using Riviera-PRO debugging features.
The Design Automation Conference (DAC) is recognized as the premier event for the design of electronic circuits and systems, and for electronic design automation (EDA) and silicon solutions. A diverse worldwide community of more than 1,000 organizations attends each year, represented by system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives, as well as researchers and academicians from leading universities. Close to 60 technical sessions selected by a committee of electronic design experts offer information on recent developments and trends, management practices and new products, methodologies and technologies. A highlight of DAC is its exhibition and suite area, with approximately 200 of the leading and emerging EDA, silicon, and intellectual property (IP) companies and design services providers. The conference is sponsored by the Association for Computing Machinery (ACM), the Electronic System Design Alliance (ESDA), and the Institute of Electrical and Electronics Engineers (IEEE), and is supported by ACM's Special Interest Group on Design. www.dac.com
Aldec Inc., headquartered in Henderson, Nevada, is an industry leader in Electronic Design Verification and offers a patented technology suite including: RTL Design, RTL Simulators, Hardware-Assisted Verification, SoC and ASIC Prototyping, Design Rule Checking, CDC Verification, IP Cores, Requirements Lifecycle Management, DO-254 Functional Verification, Embedded Solutions and Military/Aerospace solutions. www.aldec.com
Aldec is a registered trademark of Aldec, Inc. All other trademarks or registered trademarks are the property of their respective owners.
Christina Toole, + 702-990-4400