Silvaco and Aldec Partner for Analog-Mixed Signal Simulation

SANTA CLARA, Calif., June 15, 2017 (GLOBE NEWSWIRE) -- Silvaco, Inc. and Aldec today announced they have collaborated to bring a new solution for analog-mixed signal simulation combining each company’s industry-leading simulation technologies to address the growing SoC mixed-signal verification challenge. The analog circuit is handled by Silvaco’s SmartSpice™, and the digital logic is simulated using Aldec’s Riviera-Pro™.  The new mixed-signal capabilities will be demonstrated at Design Automation Conference (DAC) 2017 in Austin, Texas June 18-21 at the Silvaco booth #1447 and the Aldec booth #421.

Most designs today combine analog and digital logic, and the increasingly complex interactions between the two make mixed-signal simulation essential.  This needs to be performed as early as possible in the design process, utilizing high-level models initially as they are available, and successive refinement as the design progresses.  This requires high-performance simulation of each partition of the design, and a highly effective simulation interface for the two simulation engines. 

Silvaco’s Smartspice is a well-known, popular high performance parallel SPICE simulator that delivers industry leading accuracy.  Proven on countless designs worldwide down to 7nm FinFET, it provides both the capacity and capabilities needed for high precision analog circuit simulation.  Aldec’s Riviera-PRO enables the verification productivity, reusability, and automation by combining the high-performance simulation engine, advanced debugging capabilities at different levels of abstraction, and support for the latest Language and Verification Library Standards.  Extensive simulation optimization algorithms to achieve the highest performance in VHDL, Verilog/SystemVerilog, SystemC, and mixed-language simulations.  Together, the combined solution delivers high performance and high capacity needed for today’s complex mixed-signal designs.

A preview of this Analog Mixed-signal solution is now available to Silvaco and Aldec customers.  For details, contact Silvaco at sales@silvaco.com or Aldec at sales@aldec.com

ABOUT DAC

The Design Automation Conference (DAC) is recognized as the premier event for the design of electronic circuits and systems, and for electronic design automation (EDA) and silicon solutions. A diverse worldwide community of more than 1,000 organizations attends each year, represented by system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives as well as researchers and academicians from leading universities. Close to 60 technical sessions selected by a committee of electronic design experts offer information on recent developments and trends, management practices and new products, methodologies and technologies. A highlight of DAC is its exhibition and suite area, with approximately 200 of the leading and emerging EDA, silicon, and intellectual property (IP) companies and design services providers. The conference is sponsored by the Association for Computing Machinery (ACM), the Electronic System Design Alliance (ESDA), and the Institute of Electrical and Electronics Engineers (IEEE), and is supported by ACM's Special Interest Group on Design. www.dac.com 

ABOUT SILVACO

Silvaco, Inc. is a leading provider of IP and EDA software tools used for process and device development and for analog/mixed-signal, power IC and memory design. The portfolio also includes tools for power integrity sign off, reduction of extracted netlist for simulation speed up and variation analysis. Silvaco delivers a full TCAD-to-Signoff flow for displays, power electronics, radiation and advanced CMOS along with a complete production-proven IP portfolio including IP licensing and IP management solutions. Headquartered in Santa Clara, California, Silvaco has a global presence with offices in North America, Europe, and Asia. www.silvaco.com 

PRESS/MEDIA CONTACT: 
press@silvaco.com
Silvaco, Inc.

Primary Logo




Review Article Be the first to review this article
CST: Webinar November 9, 2017

Aldec

Featured Video
Editorial
Peggy AycinenaWhat Would Joe Do?
by Peggy Aycinena
DVCon Europe 2017: Munich and So much more
More Editorial  
Jobs
Technical Support Engineer EU/Germany/UK for EDA Careers at N/A, United Kingdom
Senior R&D Engineer...Timing Closure Specialist for EDA Careers at San Jose or Anywhere, CA
Senior Front-End RTL Design AE for EDA Careers at San Jose, CA
Upcoming Events
25th IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC 2017) at Yas Viceroy Abu Dhabi Yas Marina Circuit, Yas Island Abu Dhabi United Arab Emirates - Oct 23 - 25, 2017
ARM TechCon 2017 at Santa Clara Convention Center Santa Clara CA - Oct 24 - 26, 2017
MIPI DevCon Bangalore 2017 at The Leela Palace Bengaluru India - Oct 27, 2017
MIPI DevCon Hsinchu City 2017 at Sheraton Hsinchu Hotel Taiwan - Oct 31, 2017
CST: Webinar series
TrueCircuits: UltraPLL



Internet Business Systems © 2017 Internet Business Systems, Inc.
25 North 14th Steet, Suite 710, San Jose, CA 95112
+1 (408) 882-6554 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise