HENDERSON, Nev. — (BUSINESS WIRE) — May 16, 2017 — Aldec, Inc., a pioneer in mixed HDL language simulation and hardware-assisted verification for ASIC and FPGA designs, will showcase the new HES™ prototyping board, HES-HPC-DSP-KU115, at the Trading Show 2017 in Chicago, IL from May 17-18, 2017. Aldec’s newest FPGA Accelerator based on Xilinx® Kintex® UltraScale™ and Zynq®-7000 FPGA addresses the need to accelerate execution of High Frequency Trading (HFT) algorithms which demand extraordinary computational power and low latency.
“With this new FPGA Accelerator, Aldec is responding to increased demand for reliable, high-performance hardware which benefits from FPGA re-configurability and low power consumption. These features are essential for scalable HPC infrastructures, such as those used in HFT,” said Krzysztof Szczur, Aldec Hardware Verification Products Manager.
Similarly, the HES-HPC-DSP-KU115 is targeted for algorithms in the areas of High Performance Computing (HPC) or Digital Signal Processing (DSP) and supports fast evolving algorithms in Neural Networking and Embedded Vision with its inherent reconfigurable hardware.
HES-HPC-DSP-KU115 FPGA Accelerator Features
- Xilinx XCKU115, the largest member of Kintex UltraScale family providing > 1.4M of Logic Cells, 75.9 Mb on-chip RAM blocks and 5520 DSP slices
- Six external memories (2x 32GB DDR4 SO-DIMM and 4x 2.2Gb RLDRAM-3), accessible simultaneously for unprecedented aggregated throughput, SRAM-like interface, and low latency access
- Xilinx ZC7Z100 as a secondary device used as the Host Interface Module as it can implement PCIe or Gigabit Ethernet channels to the external host or become an embedded host running embedded Linux by its powerful dual-core ARM® Cortex™ A9 processor subsystem
- 2x QSFP+ supporting up 40Gbit/sec transmission rate to fiber network socket to assure the lowest possible latency from the source of data to the algorithm core implementation
- 1x USB 3.0, 8x SATA or custom SAMTEC FireFly port
Visitors to Aldec’s Trading Show booth may view demonstrations of the following FPGA-based verification solutions for developing FPGA-based HFT platforms:
- High-Performance mixed-HDL language simulation platform, Riviera-PRO™, supporting Python open-source Cocotb, SystemVerilog UVM and SystemC with advanced debugging features such as Advanced Dataflow, Xtrace and Code Coverage
HES FPGA Accelerator which can be based on any one of the following
- HES-HPC-DSP-KU115 - contains Kintex UltraScale XCKU115 logic module and Xilinx Zynq-7000 host module featuring ARM dual core Cortex-A9 CPU
- HES-US-440 - offers a unique combination of Xilinx Virtex UltraScale XCVU440 logic module and Xilinx Zynq-7000 host module featuring ARM dual core Cortex-A9
- HES7XV12000BP - Aldec’s large capacity board that features Xilinx Virtex-7 FPGA technology contains 6x XC7V2000T logic modules and is the most advanced single PCB prototyping board of Virtex-7 family in the market
The new HES-HPC-DSP-KU115 board is available now. To learn more or to evaluate, visit www.aldec.com, e-mail firstname.lastname@example.org, call +1 (702) 990-4400, or contact our worldwide distribution partners.
Aldec Inc., headquartered in Henderson, Nevada, is an industry leader in Electronic Design Verification and offers a patented technology suite including: RTL Design, RTL Simulators, Hardware-Assisted Verification, SoC and ASIC Prototyping, Design Rule Checking, CDC Verification, IP Cores, Requirements Lifecycle Management, DO-254 Functional Verification and Military/Aerospace solutions. www.aldec.com
Aldec is a registered trademark of Aldec, Inc. All other trademarks or registered trademarks are the property of their respective owners.
Christina Toole, + 702-990-4400