Synopsys Announces Industry's First Verification IP and Test Suites for Latest MIPI CSI-2 v2.0 and PHY Specifications

MOUNTAIN VIEW, Calif., May 4, 2017 — (PRNewswire) — Synopsys, Inc. (Nasdaq: SNPS) today announced the availability of the industry's first verification IP (VIP) and source code test suite for MIPI CSI-2�nbsp; v2.0, MIPI D-PHY�nbsp; v2.1, MIPI C-PHY�nbsp; v1.2, and MIPI M-PHY�nbsp; v4.1. Synopsys VC VIP for the latest MIPI specifications enables system-on-chip (SoC) teams to design next-generation mobility products with ease of use and integration, resulting in accelerated verification closure.

"MIPI interfaces are widely used in mobile and are rapidly being adopted in new market segments and applications like automotive, IoT, wearables, and drones," said Joel Huloux, chairman of the board of MIPI Alliance. "The latest MIPI specifications add essential new features for next-generation designs in existing as well as emerging applications. Synopsys is a trusted partner and the release of VIP for the latest MIPI specifications facilitates early adoption of the standards and strengthens the overall ecosystem."

MIPI CSI-2 v2.0, using MIPI C-PHY v1.2 and MIPI D-PHY v2.1, has added new features for scrambling, alternate low power (ALP) for C/D-PHY, virtual channel extension, latency reduction and transport efficiency (LRTE), and new data types and compression schemes. It enables higher interface bandwidth and more flexibility, especially for imaging and vision applications. The latest D-PHY v2.1 and C-PHY v1.2 add features to support CSI-2 v2.0 including low-power modes (ALP/LVLP), HS reverse mode, HS-IDLE, and higher symbol rate. In addition, M-PHY v4.1 adds ADAPT clarifications and other features to support MIPI UniPro�nbsp; v1.8, utilizing peak data rate of 11.6 Gbps per lane.  

Synopsys VIP uses a Native SystemVerilog/UVM-based architecture to design next-generation mobility chips with optimum performance. Synopsys VIP is natively integrated with Synopsys' Verdi® Protocol Analyzer debug solution and features advanced debug ports. The VIP also features error injection capabilities, built-in-protocol checks, coverage, and verification plans.

"We continue to collaborate with leading standards organizations to develop the newest protocol specifications for next-generation designs," said Vikas Gautam, group director of VIP R&D and corporate applications for the Synopsys Verification Group. "With the introduction of Synopsys VIP for latest MIPI specifications, we provide our customers with advanced capabilities to accelerate the verification closure of their SoC designs."

About Synopsys

Synopsys, Inc. (Nasdaq: SNPS) is the Silicon to Software partner for innovative companies developing the electronic products and software applications we rely on every day. As the world's 15th largest software company, Synopsys has a long history of being a global leader in electronic design automation (EDA) and semiconductor IP and is also growing its leadership in software security and quality solutions. Whether you're a system-on-chip (SoC) designer creating advanced semiconductors, or a software developer writing applications that require the highest security and quality, Synopsys has the solutions needed to deliver innovative, high-quality, secure products. Learn more at  www.synopsys.com.

Editorial Contacts: 
Carole Murchison 
Synopsys, Inc. 
650-584-4632 
carolem@synopsys.com

 

To view the original version on PR Newswire, visit: http://www.prnewswire.com/news-releases/synopsys-announces-industrys-first-verification-ip-and-test-suites-for-latest-mipi-csi-2-v20-and-phy-specifications-300451354.html

SOURCE Synopsys, Inc.

Contact:
Synopsys, Inc.
Web: http://www.synopsys.com




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