Multi-Die IC Design Guide Available Exclusively From Electronic System Design Alliance

SAN JOSE, CA -- (Marketwired) -- Jun 06, 2016 -- The Electronic System Design (ESD) Alliance, an international association of companies providing goods and services throughout the semiconductor design ecosystem, today announced availability of the latest version of the Multi-Die integrated circuit (IC) Design Guide.

Version 2016.6 of the 300-page design guide has the latest background on multi-die integration techniques and technologies and includes information provided by vendors who offer multi-die IC design and manufacturing solutions and services. Edited by Herb Reiter of eda 2 asic, it is available as a free download from www.esd-alliance.org

"As the organization focused on serving the electronic system design ecosystem, we are taking an active role to bring together the design and manufacturing communities," remarks Bob Smith, executive director of the ESD Alliance. "To that end, we're working with Herb Reiter to publish the design guide and form the System Scaling Working Group within the Alliance."

The ESD Alliance will have handouts describing multi-die IC design and contents of the comprehensive guide in its booth (#1920) at the Design Automation Conference (DAC) this week. The DAC exhibit floor will be open Monday through Wednesday from 10 a.m. until 6 p.m. at the Austin Convention Center, Austin, Texas.

About the Electronic System Design Alliance

The Electronic System Design (ESD) Alliance, an international association of companies providing goods and services throughout the semiconductor design ecosystem, is a forum to address technical, marketing, economic and legislative issues affecting the entire industry. It acts as the central voice to communicate and promote the value of the semiconductor design industry as a vital component of the global electronics industry. For more information about the ESD Alliance, visit http://www.esd-alliance.org

All trademarks and registered trademarks are the property of their respective owners.

For more information, contact:
Nanette Collins
Public Relations for the ESD Alliance 
(617) 437-1822 

Email Contact 





Review Article Be the first to review this article
Aldec

Featured Video
Editorial
Peggy AycinenaWhat Would Joe Do?
by Peggy Aycinena
Simon Davidmann: A re-energized Imperas Tutorial at DAC
Peggy AycinenaIP Showcase
by Peggy Aycinena
ARM: A Gnawing Sense of Unease
More Editorial  
Jobs
LVS PEX DESIGN ENGINEERS SILICON VALLEY for EDA Careers at San Jose, CA
DDR 3-4-5 Developer with VIP for EDA Careers at San Jose, CA
LVS for PDK Design Engineer SILICON VALLEY for EDA Careers at San Jose, CA
Senior Front-End RTL Design AE for EDA Careers at San Jose, CA
Upcoming Events
11th International Conference on Verification and Evaluation of Computer and Communication Systems at 1455 DeMaisonneuve W. EV05.139 Montreal Quebec Canada - Aug 24 - 25, 2017
DVCon India 2017, Sept 14 - 15, 2017 at The Leela Palace Bengalore India - Sep 14 - 15, 2017
SMTA International 2017 at Rosemont IL - Sep 17 - 21, 2017
DownStream: Solutions for Post Processing PCB Designs
S2C: FPGA Base prototyping- Download white paper
DownStream: Solutions for Post Processing PCB Designs



Internet Business Systems © 2017 Internet Business Systems, Inc.
595 Millich Dr., Suite 216, Campbell, CA 95008
+1 (408)-337-6870 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy Policy