elitePLUS semiconductor Technologies released a fully functional 400G PCS VIP

Bangalore - elitePLUS semiconductor Technologies, today released a fully functional 400G PCS VIP, which is verified against an IP supplied by one of the major Ethernet System Supplier. The 400G VIP is fully compliant to the latest IEEE 802.3bs (public area) specification and is written in System Verilog and UVM1.x methodology standards. The ELITE_PCS_400G VIP is packaged with source code, compliance test Cases, functional coverage and many features.

ELITE_PCS_400G Verification IP provides a smart and effective way to verify PCS Features with 400G Speed features. The Verification IP is fully compliant with the latest PCS and Ethernet standard specifications and provides the following features.

Some of the feature highlights:

VIP support and configuration:
  •  IEEE 802.3bs (public area) 400Gbps Ethernet compliant.
  •  Configurable SERDES bus width.
  •  FEC Encoder/Decoder (RS) – New architecture.
  •  Protocol checker.
  •  Coverage.
VIP controls:
  •  64B/66B Encoder Error insertion.
  •  Transcode Error insertion.
  •  Scrambler bypass support.
  •  Parameterized AM values.
  •  Parameterized AM repetition.
  •  FEC error insertion (Controlled and Random).
  •  Skew insertion.
  •  Configurable SERDES bus width. Gearbox width 40 & 64 bit.

About elitePLUS 

elitePLUS Semiconductor Technologies is an IP and Design services company established in 2014, with technical expertise in providing high quality and dependable services in Digital, Analog and Mixed Signal areas. 

We offer a spectrum of design and verification services, which includes defining specification, logic partitioning, micro-architecture, RTL coding, synthesis, developing custom and standard VIPs and verification environment development using both traditional and advanced techniques. 

Our ace team of engineers and consultants are skilled across a wide range of the most powerful modern tools, technologies and methods. We are experienced professionals in making best practices fit into existing flow and have to our credit several FIRST-PASS Silicon successes. 




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