Registration Opens for Next Decoding Formal Club Hosted by Oski Technology

Meeting to Be Held Monday, February 29, during DVCon 2016

MOUNTAIN VIEW, CALIF. –– January 28, 2016 –– 

WHO: Oski Technology, Inc., the only dedicated formal verification service provider

WHAT: Announced registration opened today for the next Decoding Formal Club meeting to be co-located with DVCon 2016

WHEN: Monday, February 29, beginning with lunch and networking at 11:30 a.m., with a full program running from 12:30 p.m. until 4 p.m.

WHERE:  DoubleTree Hotel, San Jose, Calif.

The agenda will be announced in early February. The Decoding Formal Club is a forum hosted by Oski Technology for formal verification enthusiasts, pioneers and leaders who work to promote the sharing of ideas, advancement of formal technology, and adoption of formal sign-off. This meeting will be sponsored by Synopsys.

Pre-registration is required. Registration information for the Decoding Formal Club can be found at: http://bit.ly/1OOcIe8

The Oski Technology website is located at: www.oskitechnology.com

About Oski Technology

Oski Technology is a formal verification services company with expertise in deploying formal verification on complex, digital designs. Oski Technology has developed a unique Formal Sign-off Methodology and Oski Abstraction Models to solve challenging capacity problems with formal verification. Its formal methods bring a higher level of productivity than traditional simulation and formal verification approaches. Oski Technology, headquartered in Mountain View, Calif., with a design center in India, has built a team of the world's foremost experts in formal verification. More information about Oski Technology can be found at: www.oskitechnology.com

###

Formal Sign-off Methodology is a trademark of Oski Technology, Inc. All trademarks and registered trademarks are the property of their respective owners.

Contacts:
Nanette Collins
Public Relations for Oski Technology
(617) 437-1822
Email Contact




Review Article Be the first to review this article

Aldec Simulator Evaluate Now

Featured Video
Jobs
RF IC Design Engineering Manager for Intel at Santa Clara, CA
Principal PIC Hardware Controls Engineer for Infinera Corp at Sunnyvale, CA
DSP Tools Engineer for Cirrus Logic, Inc. at Austin, TX
Design Verification Engineer for Cirrus Logic, Inc. at Austin, TX
ASIC Design Engineer for Infinera Corp at Sunnyvale, CA
Upcoming Events
IC Open Innovation Panel During REUSE 2017 at Santa Clara Convention Center 5001 Great America Parkway Santa Clara CA - Dec 14, 2017
Essentials of Electronic Technology: A Crash Course at Columbia MD - Jan 16 - 18, 2018
Essentials of Digital Technology at MD - Feb 13 - 14, 2018
CST: Webinar series
DownStream: Solutions for Post Processing PCB Designs
TrueCircuits: IoTPLL



Internet Business Systems © 2017 Internet Business Systems, Inc.
25 North 14th Steet, Suite 710, San Jose, CA 95112
+1 (408) 882-6554 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise