Power integrity @ DesignCon 2016


Two more weeks before DesignCon 2016!

Jan 6, 2016 -- DesignCon may appear package- and PCB-focused only, but it's actually also covering SoC related power integrity topics, and as DesignCon 2016 is a great opportunity to meet old friends and colleagues to discuss on-chip Dynamic Voltage Drop and in-rush current challenges, we will be there too; ready to discuss the latest and greatest on how we can improve on-chip power integrity.

In case you haven’t considered DesignCon yet, or even checked the program, note that there are a couple of really interesting sessions on power integrity. We have compiled all the details of these sessions so you can look at the descriptions, who the presenters are etc. 

Go  HERE to download the single PDF file with the full details and description.  

Wednesday Jan 20th

  • Impacts of Dynamic Noise in Multi-Core or SOC Designs 
  • Evaluation of PDN coupling on SOC 
  • A Novel Power-Supply-Induced-Jitter Suppression Technique for High-Speed Interface Using Modulated-PDN 

Thursday Jan 21st 

  • A Frequency Domain Approach to Transient Result for Power Distribution Network Analysis 
  • Block-Level Modeling Based Power and Signal Integrity Performance Optimization of Integrated Core and Memory System 
  • PDN Prototyping and Optimization at an Early Design Stage 

 



Read the complete story ...


Review Article Be the first to review this article
CST: Webinar September 14, 2017

Aldec

Featured Video
Editorial
Peggy AycinenaWhat Would Joe Do?
by Peggy Aycinena
Real Intent: Leveraging on Investments
More Editorial  
Jobs
Analog Hardware Engineer for Teradyne Inc at San Jose, CA
Technical Support Engineer EU/Germany/UK for EDA Careers at N/A, United Kingdom
Senior R&D Engineer...Timing Closure Specialist for EDA Careers at San Jose or Anywhere, CA
Field Application Engineer for Teradyne Inc at San Jose, CA
FPGA Engineer for Teradyne Inc at San Jose, CA
Senior Front-End RTL Design AE for EDA Careers at San Jose, CA
Upcoming Events
CODES+ISSS 2017, Oct 15-20, 2017, Lotte Hotel, Seoul, South Korea at Lotte Hotel Seoul Korea (North) - Oct 15 - 20, 2017
DVCon 2017 Europe, Oct 16 - 17, 2017, Munich, Germany at Holiday Inn Munich City Centre Munich Germany - Oct 16 - 17, 2017
11th International Symposium on Networks-on-Chip (NOCS 2017) at Seoul Korea (South) - Oct 19 - 20, 2017



Internet Business Systems © 2017 Internet Business Systems, Inc.
25 North 14th Steet, Suite 710, San Jose, CA 95112
+1 (408) 882-6554 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise