Grenoble, France – In order to meet the long battery-life requirements in the growing market of IoT devices, energy saving becomes a paramount concern, specifically the reduction of static power consumption when devices spend up to 99.9 % of the time in an inactive mode.
The RISC-351 Zephyr-RR is an energy efficient 32-bit microcontroller core that enables achieving ultra-low power consumption by combining innovative low-power techniques with energy saving modes, making it ideal for battery-operated applications which spend most of their operating time waiting for a wake-up event.
In order to provide further flexibility in power management than traditional 32-bit competitors, the RISC-351 Zephyr-RR introduces an advanced state "Retention mode" where essential registers are saved either by using retention registers for the most fundamental ones, or by copying state to/from memory when going to or leaving retention mode for large ones such as the register file. This advanced state retention mode enables to divide the power consumption by 1,000 compared to classic power modes where all core and peripheral clocks are gated (stop mode).
Because power modes cannot be implemented without taking into account the “wake-up duration”, users have to define the optimal trade-off between the overall power consumption and the lag-time to resume normal operation after entering into a low-power mode. This trade-off depends on the number of stored registers, voltage switching, etc.
As the impact on the embedded software remains a crucial concern for most users, even though the use of the advanced state of retention is a simple software increment with respect to standard retention, a library of dedicated functions is provided with Zephyr-RR in order to make the use of low-power modes straightforward.
Thanks to our SmartVision™ IDE, software developers can perform power consumption Profiling in order to go further in the power optimization.