New eBook shows how data mining shortens validation testing on serdes high-speed I/O buses

Statistical analytics goes beyond pass/fail testing to quantify the risks in a new design

Oct 14, 2015 -- A new eBook published by ASSET® InterTech ( www.asset-intertech.com), a leading supplier of software and hardware debug, validation and test tools, demonstrates how the data mining of validation test results can reduce the time an organization spends on validating serdes high-speed I/O (HSIO) buses and, at the same time, predict the risk of failure inherent in new designs.

“Chip vendors like Intel® and others have shown that the best practice for validating HSIO buses calls for statistical analytics on a database of test data from applying the same test several times on multiple prototypes. This ‘NxN’ methodology far surpasses the traditional one-time pass/fail testing when it comes to quantifying how close a certain bus or lane on a bus is to failing in the hands of users,” said Tim Caffee, ASSET’s vice president of design validation and test. “Data mining also allows the organization to reduce the time it spends on validation testing by standardizing the process across multiple teams, improving test stress quality, and establishing a baseline across the product life cycle.”

The new eBook, titled “Data Mining Analytics for Serdes HSIO Validation – Moving Beyond Pass/Fail” explains that passing a one-time pass/fail validation test does not give the designer an indication of the risk of failure throughout the system’s life cycle. The eBook is free and available for downloading now from the eResources section of the ASSET InterTech website at: http://www.asset-intertech.com/eresources/data-mining-analytics-serdes-hsio-validation

Other informative eBooks, white papers and videos on issues relating to chip, board and system debug, validation and test also can be downloaded from: http://www.asset-intertech.com/eResources

About ASSET InterTech

ASSET InterTech ( www.asset-intertech.com) is a leading supplier of tools to debug, validate and test software and hardware. The company’s SourcePoint™ software debug and trace platform and ScanWorks® platform for embedded instruments work in tandem to give engineers real insight from code to silicon. SourcePoint is a best-in-class, powerful debugger that includes advanced trace tools to gather data from code and quickly debug complex embedded software systems. ScanWorks controls instruments embedded in chips to test and validate chips and circuit boards. Together they empower engineers with tools and technology for the entire life-cycle of a system, beginning with software and hardware development, on to design validation, through software/hardware integration, and eventually testing the product in manufacturing and field service. ASSET InterTech is located at 2201 North Central Expressway, Suite 105, Richardson, TX 75080.

Follow us on:

Facebook:        https://www.facebook.com/ASSETInterTech

LinkedIn:        http://www.linkedin.com/company/asset-intertech-inc.

Twitter:           https://twitter.com/ASSETInterTech

You Tube:       http://www.youtube.com/ASSETInterTech

Our blog – Test Data Out:      http://blog.asset-intertech.com/

 



Read the complete story ...


Review Article Be the first to review this article

Aldec

Featured Video
Editorial
Peggy AycinenaWhat Would Joe Do?
by Peggy Aycinena
Real Intent: Leveraging on Investments
More Editorial  
Jobs
Senior R&D Engineer...Timing Closure Specialist for EDA Careers at San Jose or Anywhere, CA
Technical Support Engineer EU/Germany/UK for EDA Careers at N/A, United Kingdom
Field Application Engineer for Teradyne Inc at San Jose, CA
Senior Front-End RTL Design AE for EDA Careers at San Jose, CA
Analog Hardware Engineer for Teradyne Inc at San Jose, CA
FPGA Engineer for Teradyne Inc at San Jose, CA
Upcoming Events
CODES+ISSS 2017, Oct 15-20, 2017, Lotte Hotel, Seoul, South Korea at Lotte Hotel Seoul Korea (North) - Oct 15 - 20, 2017
DVCon 2017 Europe, Oct 16 - 17, 2017, Munich, Germany at Holiday Inn Munich City Centre Munich Germany - Oct 16 - 17, 2017
11th International Symposium on Networks-on-Chip (NOCS 2017) at Seoul Korea (South) - Oct 19 - 20, 2017
DownStream: Solutions for Post Processing PCB Designs
TrueCircuits: UltraPLL



Internet Business Systems © 2017 Internet Business Systems, Inc.
25 North 14th Steet, Suite 710, San Jose, CA 95112
+1 (408) 882-6554 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise